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M16C/62P Group (M16C/62P, M16C/62PT)
12. Interrupt
Note
12. Interrupt is described in the M16C/62P (128-pin version and 100-pin version) only as an
example.
The M16C/62P (80-pin version) do not use INT3 to INT5 interrupt of peripheral function.
The M16C/62PT (100-pin version) do not use voltage down detection interrupt.
The M16C/62PT (80-pin version) do not use voltage down detection interrupt and INT3 to INT5
interrupt of peripheral function.
12.1 Type of Interrupts
Figure 12.1 shows types of interrupts.
Software
(Non-maskable interrupt)
Interrupt
Hardware
NOTES:
1. The peripheral functions in the microcomputer are used to generate the peripheral interrupt.
2. Do not normally use this interrupt because it is provided exclusively for use by development
support tools.
Figure 12.1 Interrupts
• Maskable Interrupt: An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or
• Non-Maskable Interrupt: An interrupt which cannot be enabled (disabled) by the interrupt enable flag
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
Special
(Non-maskable interrupt)
Peripheral function
(Maskable interrupt)
whose interrupt priority can be changed by priority level.
(I flag) or whose interrupt priority cannot be changed by priority level.
page 89
f o
3
6
4
________
________
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
_______
NMI
________
DBC
(2)
Watchdog timer
Oscillation stop and re-oscillation
detection
Voltage down detection
Single step
Address match
(1)
12. Interrupt
________
________
(2)
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