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M16C/62P Group (M16C/62P, M16C/62PT)
24.14.7 Lock Bit Program Command
Write "xx77h" in the first bus cycle and write "xxD0h" to the uppermost address of a block (even address,
however) in the second bus cycle, and the lock bit for the specified block is cleared to "0". Make sure the
address value specified in the first bus cycle is the same uppermost block address that is specified in the
second bus cycle.
24.14.8 Operation speed
Before entering CPU rewrite mode (EW0 or EW1 mode), select 10 MHz or less for CPU clock using the
CM06 bit in the CM0 register and CM17 to CM16 bits in the CM1 register. Also, set the PM17 bit in the
PM1 register to 1 (with wait state).
24.14.9 Instructions inhibited against use
The following instructions cannot be used in EW0 mode because the flash memory's internal data is
referenced: UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
24.14.10 Interrupts
EW0 Mode
• Any interrupt which has a vector in the variable vector table can be used providing that its vector is
transferred into the RAM area.
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• The NMI and watchdog timer interrupts can be used because the FMR0 register and FMR1 regis-
ter are initialized when one of those interrupts occurs. The jump addresses for those interrupt
service routines should be set in the fixed vector table.
Because the rewrite operation is halted when a NMI or watchdog timer interrupt occurs, the rewrite
program must be executed again after exiting the interrupt service routine.
• The address match interrupt cannot be used because the flash memory's internal data is refer-
enced.
EW1 Mode
• Make sure that any interrupt which has a vector in the variable vector table or address match
interrupt will not be accepted during the auto program or auto erase period.
• Avoid using watchdog timer interrupts.
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• The NMI interrupt can be used because the FMR0 register and FMR1 register are initialized when
this interrupt occurs. The jump address for the interrupt service routine should be set in the fixed
vector table.
Because the rewrite operation is halted when a NMI interrupt occurs, the rewrite program must be
executed again after exiting the interrupt service routine.
24.14.11 How to access
To set the FMR01, FMR02, or FMR11 bit to "1," write "0" and then "1" in succession. This is necessary to
ensure that no interrupts or DMA transfers will occur before writing "1" after writing "0". Also only when
_______
NMI pin is "H" level.
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page 354
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24. Usage Precaution
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