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M16C/62P Group (M16C/62P, M16C/62PT)
Three-Phase PWM Control Register 0
b7
b6
b5
b4
b3
NOTES:
1. Set the INVC0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
Rewrite the INV00 to INV02 and INV06 bits when the timers A1,A2, A4 and B2 stop.
2. Set the INV01 bit to "1" after setting the ICTB2 register .
3. The INV00 and INV01 bits are enabled only when the INV11 bit is set to "1" (three-phase mode 1). The ICTB2
counter is incremented by one every time the timer B2 underflows, regardless of INV00 and INV01 bit settings,
when the INV11 bit is set to "0" (three-phase mode).
When setting the INV01 bit to "1", set the timer A1 count start flag before the first timer B2 underflow.
When the INV00 bit is set to "1", the first interrupt is generated when the timer B2 underflows n-1 times, if n is
the value set in the ICTB2 counter. Subsequent interrupts are generated every n times the timer B2 underflows.
4. Set the INV02 bit to "1" to operate the dead time timer, U-, V-and W-phase output control circuits and ICTB2
counter.
5. When the INV02 bit is set to "1" (three-phase control timer functions) and the INV03 bit to "0" (three-phase
control timer output disabled), U, U, V, V, W and W pins, including pins shared with other output functions, enter
a high-impedance state.
6. The INV03 bit is set to "0" when the followings occurs :
- Reset
- A concurrent active state occurs while INV04 bit is set to "1"
- The INV03 bit is set to "0" by program
- A signal applied to the NMI pin changes "H" to "L"
7. The INV05 bit can not be set to "1" by program. Set the INV04 bit to "0", as well, when setting the INV05 bit to "0".
8. The following table describes how the INV06 bit works.
Item
Mode
Timing to Transfer from the IDB0
and IDB1 Registers to Three-Phase
Output Shift Register
Timing to Trigger the Dead Time
Timer when the INV16 Bit=0
INV13 Bit
Transfer trigger : Timer B2 underflows and write to the INV07 bit, or write to the TB2 register when INV10 = 1
9. When the INV06 bit is set to "1", set the INV11 bit to "0" (three-phase mode 0) and the PWCON bit in the
TB2SC register to "0" (reload timer B2 with timer B2 underflow).
Figure 16.2 INVC0 Register
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
b2
b1
b0
Symbol
INVC0
Bit
Bit Name
Symbol
Interrupt Enable Output
INV00
Polarity Select Bit
Interrupt Enable Output
INV01
Specification Bit
INV02
Mode Select Bit
Output Control Bit
INV03
Positive and Negative-
INV04
Phases Concurrent Active
Disable Function Enable Bit
Positive and Negative-
Phases Concurrent Active
INV05
Output Detect Flag
Modulation Mode
INV06
(8, 9)
Select
INV07
Software Trigger Select
Triangular wave modulation mode
Transferred once by generating a
transfer trigger after setting the IDB0
and IDB1 registers
On the falling edge of a one-shot pulse
of the timer A1, A2 or A4
Enabled when the INV11 bit=1 and the
INV06 bit=0
page 146
f o
3
6
4
16. Three-Phase Motor Control Timer Function
(1)
Address
After Reset
0348h
00h
0: The ICTB2 counter is incremented by one on the
rising edge of the timer A1 reload control signal
(3)
1: The ICTB2 counter is incremented by one on the
falling edge of the timer A1 reload control signal
0: ICTB2 counter is incremented by one when
timer B2 underflows
(2, 3)
1: Selected by the INV00 bit
0: No three-phase control timer functions
(4, 5)
1: Three-phase control timer function
0: Disables three-phase control timer output
(5, 6)
1: Enables three-phase control timer output
0: Enables concurrent active output
1: Disables concurrent active output
0: Not detected
1: Detected
(7)
0: Triangular wave modulation mode
1: Sawtooth wave modulation mode
Transfer trigger is generated when the
INV07 bit is set to "1". Trigger to the dead
time timer is also generated when setting the
INV06 bit to "1". Its value is "0" when read.
INV06 = 0
Sawtooth wave modulation mode
Transferred every time a transfer trigger
is generated
By a transfer trigger, or the falling edge of
a one-shot pulse of the timer A1, A2 or A4
Disabled
RW
Function
RW
RW
RW
RW
RW
RW
RW
RW
INV06 = 1
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