Renesas M16C/62P Hardware Manual page 192

M16C/62P Group (M16C/62P, M16C/62PT)
17.1.2.4 Serial Data Logic Switching Function
The data written to the UiTB register has its logic reversed before being transmitted. Similarly, the
received data has its logic reversed when read from the UiRB register. Figure 17.18 shows serial data
logic.
(1) When the UiLCH bit in the UiC1 register = 0 (no reverse)
Transfer clock
TXDi
(no reverse)
(2) When the UiLCH bit = 1 (reverse)
Transfer clock
TXDi
(reverse)
NOTES :
1. This applies to the case where the CKPOL bit in the UiC0 register = 0
(transmit data output at the falling edge of the transfer clock),
the UFORM bit in the UiC0 register = 0 (LSB first),
the STPS bit in the UiMR register = 0 (1 stop bit) and
the PRYE bit in the UiMR register = 1 (parity enabled).
Figure 17.18 Serial Data Logic Switching
17.1.2.5 TXD and RXD I/O Polarity Inverse Function
This function inverses the polarities of the TXDi pin output and RXDi pin input. The logic levels of all
input/output data (including the start, stop and parity bits) are inversed. Figure 17.19 shows the TXD
pin output and RXD pin input polarity inverse.
(1) When the IOPOL bit in the UiMR register = 0 (no reverse)
Transfer clock
TXD
(no reverse)
RXD
(no reverse)
(2) When the IOPOL bit = 1 (reverse)
Transfer clock
TXD
(reverse)
RXD
(reverse)
NOTES :
1. This applies to the case where the UFORM bit in the UiC0 register = 0
(LSB first), the STPS bit in the UiMR register = 0 (1 stop bit) and the
PRYE bit in the UiMR register = 1 (parity enabled).
Figure 17.19 TXD and RXD I/O Polarity Inverse
R e . v 2 3 . 0 S e p 0 , 1 2 0 0 4
R E J 0 9 B 0 1 8 5 0 - 2 3 0 Z
"H"
"L"
"H"
ST D0 D1
"L"
"H"
"L"
"H"
ST D0 D1
"L"
"H"
"L"
"H"
i
ST D0 D1
"L"
"H"
i ST D0 D1
"L"
"H"
"L"
"H"
i
ST D0 D1
"L"
"H"
ST D0 D1
i
"L"
page 178
f o 3 6 4
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D2 D3 D4 D5 D6
D7 P SP
D7 P SP
ST : Start bit
P : Parity bit
SP : Stop bit
i = 0 to 2
D7 P SP
D7 P SP
D7 P SP
D7 P SP
ST : Start bit
P : Parity bit
SP : Stop bit
i = 0 to 2
17. Serial I/O