Renesas M16C/62P Hardware Manual page 381

Renesas 16-bit single-chip microcomputer
Hide thumbs Also See for M16C/62P:
Table of Contents

Advertisement

REVISION HISTORY
Rev.
Date
Page
1.0 Jan/31/Y03
1.10 May/28/Y03
(Continued)
14-19
48-50
251
Measurement conditions of switching characteristics are partly revised.
252
Figure 1.26.12 is partly revised.
255
Figure 1.26.15 is partly revised.
256
Figure 1.26.16 is partly revised.
257
Figure 1.26.17 is partly revised.
258
Figure 1.26.18 is partly revised.
259
Figure 1.26.19 is partly revised.
260
Figure 1.26.20 is partly revised.
262
Explanation of "Memory Map" is partly revised.
263
Explanation of "Boot Mode" is partly revised.
264
Figure 1.27.3 is partly revised.
268
Note of FIDR Register in Figure 1.27.4 is partly revised.
271
Figure 1.27.7 is partly revised.
272
Explanation of "Interrupts" is partly revised.
272
Explanation of "Writing in the User ROM Space" is partly revised.
274
Table 1.27.4 is partly revised.
274
Explanation of "Read Array Command" is partly revised.
278
Explanation of "Program Command" is partly revised.
287
Figure 1.27.15 is partly revised.
293
Partly revised.
2
Table 1.1.1 is partly revised.
4-5
Table 1.1.2 and 1.1.3 is partly revised.
SFR is partly revised.
Note 1 is partly revised.
20
Explanation of "Hardware Reset 1" is partly revised.
23
Note 1 is added.
24
Figure 1.5.4 is partly revised.
Note 1 of Figure 1.5.5 is partly revised.
26
Figure 1.5.7 is partly revised.
27
Table 1.5.2 is partly revised.
Table 1.5.3 is partly revised.
Explanation of "1. Limitations on Stop Mode" is partly revised.
28
Explanation of "1. Limitations on WAIT instruction" is partly revised.
Figure 1.5.8 is partly revised.
31
Note is added.
33
Explanation of "Multiplexed Bus" is revised.
34
Explanation of "(2) Data Bus" is revised.
38
Explanation of "(7) Hold Signal" is revised.
Note 3 of Table 1.7.4 is added.
39
Note 4 of Table 1.7.5 is added.
40
Explanation of "(10) Software Wait" is revised.
41
Table 1.7.7 is revised.
46
Table of Figure 1.8.5 is revised.
47
Explanation is revised.
Figures 1.8.7 to 1.8.9 is partly revised.
51
Explanation of "Clock Generation Circuit" is revised.
52
Figure 1.9.1 is revised.
53
Note of Figure 1.9.2 is revised.
55
Note 12 is added.
58
Explanation of "(1) Main clock" is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
Description
Summary
C-3

Advertisement

Table of Contents
loading

This manual is also suitable for:

M16c/62pt

Table of Contents