Renesas M16C/62P Hardware Manual page 40

Renesas 16-bit single-chip microcomputer
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M16C/62P Group (M16C/62P, M16C/62PT)
Table 4.2 SFR information (2)
A d d r e s s
0 0 4 0 h
0 0 4 1 h
0 0 4 2 h
0 0 4 3 h
I N T 3 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 4 h
Timer B5 Interrupt Control Register
0 0 4 5 h
0 0 4 6 h
T i m e r B 4 I n t e r r u p t C o n t r o l R e g i s t e r , U A R T 1 B U S C o l l i s i o n D e t e c t i o n I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 7 h
T i m e r B 3 I n t e r r u p t C o n t r o l R e g i s t e r , U A R T 0 B U S C o l l i s i o n D e t e c t i o n I n t e r r u p t C o n t r o l R e g i s t e r
S I / O 4 I n t e r r u p t C o n t r o l R e g i s t e r ( S 4 I C ) , I N T 5 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 8 h
0 0 4 9 h
S I / O 3 I n t e r r u p t C o n t r o l R e g i s t e r , I N T 4 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 A h
U A R T 2 B u s C o l l i s i o n D e t e c t i o n I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 B h
D M A 0 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 C h
D M A 1 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 D h
K e y I n p u t I n t e r r u p t C o n t r o l R e g i s t e r
0 0 4 E h
A/D Conversion Interrupt Control Register
0 0 4 F h
UART2 Transmit Interrupt Control Register
0 0 5 0 h
UART2 Receive Interrupt Control Register
0 0 5 1 h
U A R T 0 T r a n s m i t I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 2 h
U A R T 0 R e c e i v e I n t e r r u p t C o n t r o l R e g i s t e r
U A R T 1 T r a n s m i t I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 3 h
0 0 5 4 h
U A R T 1 R e c e i v e I n t e r r u p t C o n t r o l R e g i s t e r
Timer A0 Interrupt Control Register
0 0 5 5 h
T i m e r A 1 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 6 h
0 0 5 7 h
T i m e r A 2 I n t e r r u p t C o n t r o l R e g i s t e r
Timer A3 Interrupt Control Register
0 0 5 8 h
T i m e r A 4 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 9 h
0 0 5 A h
T i m e r B 0 I n t e r r u p t C o n t r o l R e g i s t e r
Timer B1 Interrupt Control Register
0 0 5 B h
T i m e r B 2 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 C h
0 0 5 D h
INT0 Interrupt Control Register
0 0 5 E h
I N T 1 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 5 F h
I N T 2 I n t e r r u p t C o n t r o l R e g i s t e r
0 0 6 0 h
0 0 6 1 h
0 0 6 2 h
0 0 6 3 h
0 0 6 4 h
0 0 6 5 h
0 0 6 6 h
0 0 6 7 h
0 0 6 8 h
0 0 6 9 h
0 0 6 A h
0 0 6 B h
0 0 6 C h
0 0 6 D h
0 0 6 E h
0 0 6 F h
0 0 7 0 h
0 0 7 1 h
0 0 7 2 h
0 0 7 3 h
0 0 7 4 h
0 0 7 5 h
0 0 7 6 h
0 0 7 7 h
0 0 7 8 h
0 0 7 9 h
0 0 7 A h
0 0 7 B h
0 0 7 C h
0 0 7 D h
0 0 7 E h
0 0 7 F h
NO T E S :
1 . T h e b l a n k a r e a s a r e r e s e r v e d a n d c a n n o t b e a c c e s s e d b y u s e r s .
X : N o t h i n g i s m a p p e d t o t h i s b i t
R
e
. v
. 2
0 3
S
p e
0
, 1
0 2
4 0
R
E
J
9 0
B
0
8 1
- 5
2 0
0 3
Z
(1)
R e g i s t e r
page 26
f o
3
4 6
4. Special Function Register (SFR)
S y m b o l
A f t e r R e s e t
I N T 3 I C
X X 0 0 X 0 0 0 b
TB5IC
XXXXX000b
X X X X X 0 0 0 b
T B 4 I C , U 1 B C N I C
X X X X X 0 0 0 b
T B 3 I C , U 0 B C N I C
S 4 I C
I N T 5 I C
X X 0 0 X 0 0 0 b
,
S 3 I C
I N T 4 I C
X X 0 0 X 0 0 0 b
,
B C N I C
X X X X X 0 0 0 b
D M 0 I C
X X X X X 0 0 0 b
D M 1 I C
X X X X X 0 0 0 b
K U P I C
X X X X X 0 0 0 b
ADIC
XXXXX000b
S2TIC
XXXXX000b
S2RIC
XXXXX000b
S 0 T I C
X X X X X 0 0 0 b
S 0 R I C
X X X X X 0 0 0 b
S 1 T I C
X X X X X 0 0 0 b
S 1 R I C
X X X X X 0 0 0 b
TA0IC
XXXXX000b
T A 1 I C
X X X X X 0 0 0 b
T A 2 I C
X X X X X 0 0 0 b
TA3IC
XXXXX000b
T A 4 I C
X X X X X 0 0 0 b
T B 0 I C
X X X X X 0 0 0 b
TB1IC
XXXXX000b
T B 2 I C
X X X X X 0 0 0 b
INT0IC
XX00X000b
I N T 1 I C
X X 0 0 X 0 0 0 b
I N T 2 I C
X X 0 0 X 0 0 0 b

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