Table of Contents
Advertisement
M16C/62P Group (M16C/62P, M16C/62PT)
(UART0)
RXD0
Clock source selection
CLK1 to CLK0
00h
f1SIO or f2SIO
01h
f8SIO
10h
f32SIO
CLK0
CTS0 /
RTS0
Figure 17.1 UART0 Block Diagram
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
RXD polarity
reversing circuit
1/16
CKDIR
Internal
U0BRG
register
0
1 / (n0+1)
1/16
1
External
1/2
Clock synchronous type
CKPOL
(when internal clock is selected)
1
VSS
0
RCSP
1
1
0
page 155
f o
3
6
4
PCLK1
UART reception
Clock synchronous
type
UART transmission
Clock synchronous type
Clock synchronous type
(when internal clock is selected)
Clock synchronous
CKDIR
type
(when external clock
is selected)
RTS0
CTS0
17. Serial I/O
f1SIO or f2SIO
Transmit/
receive
unit
TXD0
Advertisement
Table of Contents
