Renesas M16C/62P Hardware Manual page 58

Renesas 16-bit single-chip microcomputer
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M16C/62P Group (M16C/62P, M16C/62PT)
Processor Mode Register 1
b7
b6
b5
b4
b3
0
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
2. Set the PM10 bit to "0" for Mask ROM version. For flash memory version, the PM10 bit controls whether
Block A is enabled or disabled. When the PM10 bit is set to "1", 0F000h to 0FFFFh can be used as internal
ROM area. In addition, the PM10 bit is automatically set to "1" while the FMR01 bit in the FMR0 register is set
to "1" (CPU rewrite mode).
3. Effective when the PM01 to PM00 bits are set to "01b" (memory expansion mode) or "11b" (microprocessor
mode).
4. PM12 bit is set to "1" by writing a "1" in a program (writing a "0" has no effect).
5. When PM17 bit is set to "1" (with wait state), one wait state is inserted when accessing the internal RAM, or
internal ROM.
When PM17 bit is set to "1" and accesses an external area, set the CSiW bit in the CSR register (i=0 to 3) to "0"
(with wait state).
6. The PM13 bit is automatically set to "1" when the FMR01 bit in the FMR0 register is "1" (CPU rewrite mode).
7. The access area is changed by the PM13 bit as listed in the table below.
Access Area
Internal RAM
ROM
External
Figure 7.2 PM1 Register
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
(1)
b2
b1
b0
Symbol
PM1
Bit Symbol
PM10
CS2 Area Switch Bit
(Data Block Enable Bit)
Port P3_7 to P3_4
PM11
Function Select Bit
PM12
Watchdog Timer Function
Select Bit
Internal Reserved Area
PM13
Expansion Bit
Memory Area
PM14
Expansion Bit
PM15
Reserved Bit
(b6)
PM17
Wait Bit
PM13=0
Up to Addresses 00400h to 03FFFh (15 Kbytes)
Up to Addresses D0000h to FFFFFh (192 Kbytes)
Addresses 04000h to 07FFFh are usable
Addresses 80000h to CFFFFh are usable
page 44
f o
3
6
4
Address
After Reset
0005h
0X001000b
Bit Name
0: 08000h to 26FFFh
(Block A disable)
(2)
1: 10000h to 26FFFh
(Block A enable)
0 : Address output
(3)
1 : Port function
0 : Watchdog timer interrupt
1 : Watchdog timer reset
(NOTE 7)
(6)
b5 b4
0 0 : 1-Mbyte mode
(3)
(Do not expand)
0 1 : Do not be set
1 0 : Do not be set
1 1 : 4-Mbyte mode
Set to "0".
0 : No wait state
(5)
1 : With wait state (1 wait)
The entire area is usable
The entire area is usable
Addresses 04000h to 07FFFh are reserved
Addresses 80000h to CFFFFh are reserved
7. Processor Mode
Function
RW
RW
RW
RW
(4)
RW
RW
RW
RW
RW
PM13=1

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