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M16C/62P Group (M16C/62P, M16C/62PT)
Table 23.2 Recommended Operating Conditions (1)
S y m b o l
V
, V
S u p p l y V o l t a g e ( V
CC1
CC2
AVcc
A n a l o g S u p p l y V o l t a g e
Vss
S u p p l y V o l t a g e
AVss
A n a l o g S u p p l y V o l t a g e
H I G H I n p u t
V o l t a g e
V
IH
L O W I n p u t
V o l t a g e
V
IL
H I G H P e a k O u t p u t
I
OH (peak)
C u r r e n t
H I G H A v e r a g e
I
O u t p u t C u r r e n t
OH (avg)
L O W P e a k O u t p u t
I
C u r r e n t
OL (peak)
L O W A v e r a g e
I
OL (avg)
O u t p u t C u r r e n t
Main Clock Input Oscillation Frequency
f (XIN)
f ( X C I N )
S u b - C l o c k O s c i l l a t i o n F r e q u e n c y
f (Ring)
O n - c h i p O s c i l l a t i o n F r e q u e n c y
f ( P L L )
P L L C l o c k O s c i l l a t i o n F r e q u e n c y
f (BCLK)
CPU Operation Clock
t
P L L F r e q u e n c y S y n t h e s i z e r S t a b i l i z a t i o n W a i t T i m e
( P L L )
S U
NOTES:
1. Referenced to V
CC1
2. The mean output current is the mean value within 100ms.
3. The total I
for ports P0, P1, P2, P8_6, P8_7, P9, P10, P11, P14_0 and P14_1 must be 80mA max. The total I
OL (peak)
ports P3, P4, P5, P6, P7, P8_0 to P8_4, P12, and P13 must be 80mA max. The total I
-40mA max. The total I
P8_0 to P8_4 must be -40mA max. The total I
4. Relationship between main clock oscillation frequency, PLL clock oscillation frequency and supply voltage.
Main clock input oscillation frequency
20 x V
16.0
10.0
0.0
V
CC1
5. There is no external connections for port P1_0 to P1_7, P4_4 to P4_7, P7_2 to P7_5 and P9_1 in 80-pin version.
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
P a r a m e t e r
≥
)
C C 1
V C C 2
P 3 _ 1 t o P 3 _ 7 , P 4 _ 0 t o P 4 _ 7 , P 5 _ 0 t o P 5 _ 7 , P 1 2 _ 0 t o P 1 2 _ 7 , P 1 3 _ 0 t o P 1 3 _ 7
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 ( d u r i n g s i n g l e - c h i p m o d e )
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0
( d a t a i n p u t d u r i n g m e m o r y e x p a n s i o n a n d m i c r o p r o c e s s o r m o d e s )
P 6 _ 0 t o P 6 _ 7 , P 7 _ 2 t o P 7 _ 7 , P 8 _ 0 t o P 8 _ 7 , P 9 _ 0 t o P 9 _ 7 , P 1 0 _ 0 t o P 1 0 _ 7 ,
P 1 1 _ 0 t o P 1 1 _ 7 , P 1 4 _ 0 , P 1 4 _ 1 ,
X I N , R E S E T , C N V S S , B Y T E
P 7 _ 0 , P 7 _ 1
P 3 _ 1 t o P 3 _ 7 , P 4 _ 0 t o P 4 _ 7 , P 5 _ 0 t o P 5 _ 7 , P 1 2 _ 0 t o P 1 2 _ 7 , P 1 3 _ 0 t o P 1 3 _ 7
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 ( d u r i n g s i n g l e - c h i p m o d e )
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0
( d a t a i n p u t d u r i n g m e m o r y e x p a n s i o n a n d m i c r o p r o c e s s o r m o d e s )
P 6 _ 0 t o P 6 _ 7 , P 7 _ 0 t o P 7 _ 7 , P 8 _ 0 t o P 8 _ 7 , P 9 _ 0 t o P 9 _ 7 , P 1 0 _ 0 t o P 1 0 _ 7 ,
P 1 1 _ 0 t o P 1 1 _ 7 , P 1 4 _ 0 , P 1 4 _ 1 ,
X I N , R E S E T , C N V S S , B Y T E
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 t o P 3 _ 7 ,
P 4 _ 0 t o P 4 _ 7 , P 5 _ 0 t o P 5 _ 7 , P 6 _ 0 t o P 6 _ 7 , P 7 _ 2 t o P 7 _ 7 ,
P 8 _ 0 t o P 8 _ 4 , P 8 _ 6 , P 8 _ 7 , P 9 _ 0 t o P 9 _ 7 , P 1 0 _ 0 t o P 1 0 _ 7 ,
P 1 1 _ 0 t o P 1 1 _ 7 , P 1 2 _ 0 t o P 1 2 _ 7 , P 1 3 _ 0 t o P 1 3 _ 7 , P 1 4 _ 0 , P 1 4 _ 1
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 t o P 3 _ 7 ,
P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_2 to P7_7,
P 8 _ 0 t o P 8 _ 4 , P 8 _ 6 , P 8 _ 7 , P 9 _ 0 t o P 9 _ 7 , P 1 0 _ 0 t o P 1 0 _ 7 ,
P 1 1 _ 0 t o P 1 1 _ 7 , P 1 2 _ 0 t o P 1 2 _ 7 , P 1 3 _ 0 t o P 1 3 _ 7 , P 1 4 _ 0 , P 1 4 _ 1
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 t o P 3 _ 7 ,
P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7,
P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7,
P11_0 to P11_7, P12_0 to P12_7, P13_0 to P13_7, P14_0, P14_1
P 0 _ 0 t o P 0 _ 7 , P 1 _ 0 t o P 1 _ 7 , P 2 _ 0 t o P 2 _ 7 , P 3 _ 0 t o P 3 _ 7 ,
P 4 _ 0 t o P 4 _ 7 , P 5 _ 0 t o P 5 _ 7 , P 6 _ 0 t o P 6 _ 7 , P 7 _ 0 t o P 7 _ 7 ,
P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7,
P 1 1 _ 0 t o P 1 1 _ 7 , P 1 2 _ 0 t o P 1 2 _ 7 , P 1 3 _ 0 t o P 1 3 _ 7 , P 1 4 _ 0 , P 1 4 _ 1
(4)
( 4 )
= -20 to 85 °C / -40 to 85 °C unless otherwise specified.
= V
= 2.7 to 5.5V at T
CC2
opr
for ports P3, P4, P5, P12, and P13 must be -40mA max. The total I
OH (peak)
OH (peak)
-44MHz
CC1
2.7
3.0
5.5
[V] (main clock: no division)
page 275
f o
3
6
4
23. Electrical Characteristics (M16C/62P)
(1)
V
=3.0 to 5.5V
CC1
V
=2.7 to 3.0V
CC1
V
= 3 . 0 t o 5 . 5 V
C C 1
V
=2.7 to 3.0V
CC1
V
= 5 . 0 V
C C 1
V
=3.0V
CC1
for ports P8_6, P8_7, P9, P10, P11, P14_0, and P14_1 must be -40mA max.
24.0
10.0
0.0
Standard
Min.
T y p .
M a x .
2 . 7
5 . 0
5 . 5
V
C C 1
0
0
V
0 . 8 V
C C 2
0 . 8 V
V
C C 2
0.5V
V
CC2
0 . 8 V
V
C C 1
0 . 8 V
6 . 5
C C 1
0
0 . 2 V
0
0 . 2 V
0
0 . 1 6 V
0
0 . 2 V
- 1 0 . 0
-5.0
1 0 . 0
5 . 0
0
0
20 X V
32.768
50
0.5
1
10
24
4 6 . 6 7 X V
10
1 1 6
0
for ports P0, P1, and P2 must be
OH (peak)
for ports P6, P7, and
OH (peak)
PLL clock oscillation frequency
46.67 x V
-116MHz
CC1
2.7
3.0
5.5
V
[V] (PLL clock oscillation)
CC1
U n i t
V
V
V
V
V
C C 2
V
C C 2
V
CC2
V
C C 1
V
V
C C 2
V
C C 2
C C 2
V
V
C C 1
m A
mA
m A
m A
1 6
MHz
MHz
-44
CC1
kHz
2
MHz
MHz
MHz
-
C C 1
MHz
2 4
2 0
ms
ms
5 0
for
OL (peak)
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