Renesas M16C/62P Hardware Manual page 109

M16C/62P Group (M16C/62P, M16C/62PT)
Interrupt Control Register
b7 b6 b5 b4
NOTES:
1. This bit can only be reset by writing "0" (Do not write "1").
2. To rewrite the interrupt control registers, do so at a point that does not generate the interrupt request for that
register. For details, refer to 24.6 precautions for interrupt.
3. Use the IFSR2A register to select.
b7 b6 b5 b4
0
NOTES:
1. This bit can only be reset by writing "0" (Do not write "1").
2. To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that
register. For details, refer to 24.6 precautions for interrupt.
3. If the IFSRi bit (i = 0 to 5) in the IFSR register are "1" (both edges), set the POL bit in the INTiIC register to "0"
(falling edge).
4. When the BYTE pin is low and the processor mode is memory expansion or microprocessor mode, set the
LVL2 to ILVL0 bits in the INT5IC to INT3IC registers to "000b" (interrupts disabled).
5. Set the POL bit in the S3IC or S4IC register to "0" (falling edge) when the IFSR6 bit in the IFSR register = 0
(SI/O3 selected) or IFSR7 bit = 0 (SI/O4 selected), respectively.
Figure 12.3 Interrupt Control Registers
R e . v 2 3 . 0 S e p 0 , 1 2 0 0 4
R E J 0 9 B 0 1 8 5 0 - 2 3 0 Z
(2)
Symbol
TB5IC
TB4IC/U1BCNIC
TB3IC/U0BCNIC
BCNIC
DM0IC, DM1IC
KUPIC
ADIC
S0TIC to S2TIC
b3 b2 b1 b0
S0RIC to S2RIC
TA0IC to TA4IC
TB0IC to TB2IC
Bit Symbol
Interrupt Priority Level
ILVL0
Select Bit
ILVL1
ILVL2
IR Interrupt Request Bit
Nothing is assigned.
When write, set to "0".
(b7-b4)
When read, their contents are indeterminate.
Symbol
(4)
INT3IC
b3 b2 b1 b0
S4IC/INT5IC
S3IC/INT4IC
INT0IC to INT2IC
Bit
Symbol
Interrupt Priority Level
ILVL0
Select Bit
ILVL1
ILVL2
IR
Interrupt Request Bit
POL Polarity Select Bit
Reserved Bit
(b5)
Nothing is assigned.
When write, set to "0".
(b7-b6)
When read, their contents are indeterminate.
page 95
f o 3 6 4
Address
0045h
(3)
0046h
(3)
0047h
004Ah
004Bh, 004Ch
004Dh
004Eh
0051h, 0053h, 004Fh
0052h, 0054h, 0050h
0055h to 0059h
005Ah to 005Ch
Bit
Name
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : Interrupt not requested
1 : Interrupt requested
Address After Reset
0044h XX00X000b
0048h XX00X000b
0049h XX00X000b
005Dh to 005Fh XX00X000b
Bit
Name
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Set to "0"
12. Interrupt
After Reset
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
XXXXX000b
Function
RW
RW
RW
RW
(1)
RW
Function
RW
RW
RW
RW
(1)
RW
(3, 5)
RW
RW