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M16C/62P Group (M16C/62P, M16C/62PT)
Address Match Interrupt Enable Register
b7
b6
b5
b4
b3
Address Match Interrupt Enable Register 2
b7
b6
b5
b4
b3
Address Match Interrupt Register i (i = 0 to 3)
(b19)
(b23)
b7
b3
Figure 12.12 AIER Register, AIER2 Register and RMAD0 to RMAD3 Registers
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
b2
b1
b0
Symbol
AIER
Bit Symbol
AIER0
AIER1
(b7-b2)
b2
b1
b0
Symbol
AIER2
Bit Symbol
AIER20
AIER21
(b7-b2)
(b16)
(b15)
(b8)
b0 b7
b0
b7
Address setting register for address match interrupt
Nothing is assigned.
When write, set to "0".
When read, their contents are indeterminate.
f o
3
6
4
page 106
Address
After Reset
0009h
XXXXXX00b
Bit Name
Address Match Interrupt 0
Enable Bit
Address Match Interrupt 1
Enable bit
Nothing is assigned.
When write, set to "0".
When read, their contents are indeterminate.
Address
After Reset
01BBh
XXXXXX00b
Bit Name
Address Match Interrupt 2
Enable Bit
Address Match Interrupt 3
Enable Bit
Nothing is assigned.
When write, set to "0".
When read, their contents are indeterminate.
Symbol
b0
RMAD0
RMAD1
RMAD2
RMAD3
Function
Function
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
Function
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
Address
After Reset
0012h to 0010h
0016h to 0014h
01BAh to 01B8h
01BEh to 01BCh
Setting Range
00000h to FFFFFh
12. Interrupt
RW
RW
RW
RW
RW
RW
X00000h
X00000h
X00000h
X00000h
RW
RW
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