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M16C/62P Group (M16C/62P, M16C/62PT)
24.8.2.3 Timer B (Pulse Period/pulse Width Measurement Mode)
The timer remains idle after reset. Set the mode, count source, etc. using the TBiMR (i = 0 to 5)
register before setting the TBiS bit in the TABSR or the TBSR register to "1" (count starts).
Always make sure the TBiMR register is modified while the TBiS bit remains "0" (count stops) regard-
less whether after reset or not. To clear the MR3 bit to "0" by writing to the TBiMR register while the
TBiS bit = 1 (count starts), be sure to write the same value as previously written to the TM0D0, TM0D1,
MR0, MR1, TCK0 and TCK1 bits and a 0 to the MR2 bit.
The IR bit in the TBiIC register (i=0 to 5) goes to "1" (interrupt request), when an effective edge of a
measurement pulse is input or Timer Bi is overflowed. The factor of interrupt request can be deter-
mined by use of the MR3 bit in the TBiMR register within the interrupt routine.
If the source of interrupt cannot be identified by the MR3 bit such as when the measurement pulse
input and a timer overflow occur at the same time, use another timer to count the number of times
Timer B has overflowed.
To set the MR3 bit to "0" (no overflow), set TBiMR register with setting the TBiS bit to "1" and counting
the next count source after setting the MR3 bit to "1" (overflow).
Use the IR bit to detect only overflows. Use the MR3 bit only to determine the interrupt factor within the
interrupt routine.
When a count is started and the first effective edge is input, an indeterminate value is transferred to
the reload register. At this time, Timer Bi interrupt request is not generated.
A value of the counter is indeterminate at the beginning of a count. MR3 may be set to "1" and Timer
Bi interrupt request may be generated between a count start and an effective edge input.
For pulse width measurement, pulse widths are successively measured. Use program to check
whether the measurement result is an "H" level width or an "L" level width.
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24. Usage Precaution
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