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M16C/62P Group (M16C/62P, M16C/62PT)
3. Memory
Figure 3.1 is a memory map of the M16C/62P group. The address space extends the 1M bytes from
address 00000h to FFFFFh.
The internal ROM is allocated in a lower address direction beginning with address FFFFFh. For example, a
64-Kbyte internal ROM is allocated to the addresses from F0000h to FFFFFh.
As for the flash memory version, 4-Kbyte space (block A) exists in 0F000h to 0FFFFh. 4-Kbyte space is
mainly for storing data. In addition to storing data, 4-Kbyte space also can store programs.
The fixed interrupt vector table is allocated to the addresses from FFFDCh to FFFFFh. Therefore, store the
start address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 00400h. For example,
a 10-Kbyte internal RAM is allocated to the addresses from 00400h to 02BFFh. In addition to storing data,
the internal RAM also stores the stack used when calling subroutines and when interrupts are generated.
The SRF is allocated to the addresses from 00000h to 003FFh. Peripheral function control registers are
located here. Of the SFR, any area which has no functions allocated is reserved for future use and cannot
be used by users.
The special page vector table is allocated to the addresses from FFE00h to FFFDBh. This vector is used by
the JMPS or JSRS instruction. For details, refer to the M16C/60 and M16C/20 Series Software Manual.
In memory expansion and microprocessor modes, some areas are reserved for future use and cannot be
used by users. Use M16C/62P (80-pin version) and M16C/62PT in single-chip mode. The memory expan-
sion and microprocessor modes cannot be used.
Internal RAM
Size
Address XXXXXh
4K bytes
013FFh
5K bytes
017FFh
10K bytes
02BFFh
12K bytes
033FFh
16K bytes
043FFh
20K bytes
053FFh
24K bytes
063FFh
31K bytes
07FFFh
NOTES:
1. During memory expansion and microprocessor modes, can not be used.
2. In memory expansion mode, can not be used.
3. As for the flash memory version, 4-Kbyte space (block A) exists.
4. Shown here is a memory map for the case where the PM10 bit in the PM1 register is "1"
and the PM13 bit in the PM1 register is "1".
5. When using the masked ROM version, write nothing to internal ROM area.
Figure 3.1 Memory Map
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
XXXXXh
0F000h
0FFFFh
(3)
Internal ROM
Size
Address YYYYYh
48K bytes
F4000h
64K bytes
F0000h
96K bytes
E8000h
128K bytes
E0000h
192K bytes
D0000h
256K bytes
YYYYYh
C0000h
B0000h
320K bytes
A0000h
384K bytes
80000h
512K bytes
FFFFFh
page 24
f o
3
6
4
00000h
SFR
00400h
Internal RAM
(1)
Reserved area
Internal ROM
(3)
(data area)
10000h
External area
27000h
Reserved area
28000h
External area
80000h
(2)
Reserved area
Internal ROM
(5)
(program area)
3. Memory
FFE00h
Special page
vector table
FFFDCh
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
FFFFFh
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