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M16C/62P Group (M16C/62P, M16C/62PT)
Watchdog Timer Control Register
b7
b6
b5
b4 b3
b2
0
NOTES:
1. Writing to the WDC register causes the WDC5 bit to be set to "1" (warm start). If the voltage applied to
VCC1 is less than 4.0 V, either write to this register when the CPU clock frequency is 2 MHz or write twice.
2. The WDC5 bit is set to "0" (cold start) when power is turned on and can be set to "1" by program only.
Watchdog Timer Start Register
b7
NOTES :
1. Write to the WDTS register after the watchdog timer interrupt occurs.
Figure 13.2 WDC Register and WDTS Register
13.1 Count source protective mode
In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer
can be kept being clocked even when CPU clock stops as a result of run-away.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to "1" (enable writes to PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to "1" (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to "1" (on-chip oscillator clock used for the watchdog timer count
source).
(4) Set the PRC1 bit in the PRCR register to "0" (disable writes to PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit in the PM register to "1" results in the following conditions
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
count source.
Watchdog timer period =
• The CM10 bit in the CM1 register is disabled against write (Writing a "1" has no effect, nor is stop mode
entered).
• The watchdog timer does not stop when in wait mode or hold state.
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
b1
b0
Symbol
WDC
Bit Symbol
High-order Bit of Watchdog Timer
(b4-b0)
Cold Start / Warm Start
WDC5
Discrimination Flag
Reserved Bit
(b6)
WDC7
Prescaler Select Bit
(1)
b0
Symbol
WDTS
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to "7FFFh"
regardless of whatever value is written.
Watchdog timer count (32768)
page 108
f o
3
6
4
Address
After Reset
000Fh
00XXXXXXb
Bit Name
0 : Cold Start
(1, 2)
1 : Warm Start
Set to "0"
0 : Divided by 16
1 : Divided by 128
Address
After Reset
000Eh
Indeterminate
Function
on-chip oscillator clock
13. Watchdog Timer
(2)
Function
RW
RO
RW
RW
RW
RW
WO
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