Renesas M16C/62P Hardware Manual page 180

Renesas 16-bit single-chip microcomputer
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M16C/62P Group (M16C/62P, M16C/62PT)
Table 17.3 lists the functions of the input/output pins during clock synchronous serial I/O mode. Table
17.3 shows pin functions for the case where the multiple transfer clock output pin select function is dese-
lected. Table 17.4 lists the P6_4 pin functions during clock synchronous serial I/O mode. Note that for a
period from when the UARTi operation mode is selected to when transfer starts, the TXDi pin outputs an
"H" (If the N-channel open-drain output is selected, this pin is in a high-impedance state).
Table 17.3 Pin Functions (When Not Select Multiple Transfer Clock Output Pin Function)
Pin Name
TXDi (i = 0 to 2)
Serial Data Output
(P6_3, P6_7,
P7_0)
RXDi
Serial Data Input
(P6_2, P6_6,
P7_1)
CLKi
Transfer Clock Output
(P6_1, P6_5,
P7_2)
Transfer Clock Input
CTSi/RTSi
CTS Input
(P6_0, P6_4,
P7_3)
RTS Output
I/O Port
Table 17.4 P6_4 Pin Functions
Pin Function
U1C0 Register
CRD
P6_4
CTS1
RTS1
(1)
CTS0
CLKS1
NOTES:
1. In addition to this, set the CRD bit in the U0C0 register to "0" (CTS0/RTS0 enabled) and
the CRS bit in the U0C0 register to "1" (RTS0 selected).
2. When the CLKMD1 bit = 1 and the CLKMD0 bit = 0, the following logic levels are output:
• High if the CLKPOL bit in the U1C0 register = 0
• Low if the CLKPOL bit = 1
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
Function
(Outputs dummy data when performing reception only)
PD6_2 bit and PD6_6 bit in the PD6 register = 0, PD7_1 bit in the PD7 register = 0
(Can be used as an input port when performing transmission only)
CKDIR bit in the UiMR register = 0
CKDIR bit = 1
PD6_1 bit and PD6_5 bit in the PD6 register = 0, PD7_2 bit in the PD7 register = 0
CRD bit in the UiC0 register = 0
CRS bit in the UiC0 register = 0
PD6_0 and PD6_4 bit in the PD6 register = 0, PD7_3 bit in the PD7 register = 0
CRD bit = 0
CRS bit = 1
CRD bit = 1
Bit Set Value
CRS
RCSP
1
0
0
0
0
0
1
0
0
0
1
page 166
f o
3
6
4
Method of Selection
UCON Register
CLKMD0
CLKMD1
0
0
0
0
(2)
1
1
17. Serial I/O
PD6 Register
PD6_4
Input: 0, Output: 1
0
0

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