Renesas M16C/62P Hardware Manual page 162

Renesas 16-bit single-chip microcomputer
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M16C/62P Group (M16C/62P, M16C/62PT)
Three-Phase Output Buffer Register i
b7
b6
b5
b4
b3
0 0
NOTES:
1. Values of the IDB0 and IDB1 registers are transferred to the three-phase output shift register by a
transfer trigger.
After the transfer trigger occurs, the values written in the IDB0 register determine each phase output
signal first. Then the value written in the IDB1 register on the falling edge of timers A1, A2 and A4 one-
shot pulse determines each phase output signal.
Dead Time Timer
b7
NOTES:
1. Use the MOV instruction to set the DTT register.
2. The DTT register is enabled when the INV15 bit in the INVC1 register is set to "0" (dead time
enabled). No dead time can be set when the INV15 bit is set to "1" (dead time disabled). The INV06
bit in the INVC0 register determines start trigger of the DTT register.
Figure 16.4 IDB0 Register, IDB1 Register, and DTT Register
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
Symbol
b2
b1
b0
IDB0, IDB1
Bit
Symbol
DUi
U-Phase Output Buffer i
DUBi
U-Phase Output Buffer i
DVi
V-Phase Output Buffer i
DVBi
V-Phase Output Buffer i
DWi
W-Phase Output Buffer i
DWBi
W-Phase Output Buffer i
Reserved Bit
(b7 - b6)
(1, 2)
b0
Symbol
DTT
If setting value is n, the timer stops when counting
n times a count source selected by the INV12 bit
after start trigger occurs. Positive or negative
phase, which changes from inactive level to active
level, shifts when the dead time timer stops.
page 148
f o
3
6
4
16. Three-Phase Motor Control Timer Function
(1)
(i=0, 1)
Address
034Ah, 034Bh
Bit Name
Write output level
0: Active level
1: Inactive level
When read, the value of the three-
phase shift register is read.
Set to "0"
Address
034Ch
Function
After Reset
00h
Function
RW
RW
RW
RW
RW
RW
RW
RO
After Reset
Indeterminate
Setting Range
RW
1 to 255
WO

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