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M16C/62P Group (M16C/62P, M16C/62PT)
Processor Mode Register 0
b7
b6
b5
b4
b3
b2
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
2. Effective when the PM01 to PM00 bits are set to "01b" (memory expansion mode) or "11b" (microprocessor
mode).
3. To set the PM01 to PM00 bits are "01b" and the PM05 to PM04 bits are "11b" (multiplexed bus assigned to
the entire CS space), apply an "H" signal to the BYTE pin (external data bus is 8 bits wide). While the CNVSS
pin is held "H" (= VCC1), do not rewrite the PM05 to PM04 bits to "11b" after reset.
If the PM05 to PM04 bits are set to "11b" during memory expansion mode, P3_1 to P3_7 and P4_0 to P4_3
become I/O ports, in which case the accessible area for each CS is 256 bytes.
4. The PM01 to PM00 bits do not change at software reset, watchdog timer reset and oscillation stop detection
reset.
Figure 7.1 PM0 Register
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
(1)
b1
b0
Symbol
PM0
Bit symbol
Processor Mode Bit
PM00
PM01
R/W Mode Select Bit
PM02
Software Reset Bit
PM03
Multiplexed Bus Space
PM04
Select Bit
PM05
Port P4_0 to P4_3
PM06
Function Select Bit
BCLK Output
PM07
Disable Bit
page 43
f o
3
6
4
Address
After Reset
0004h
00000000b (CNVSS pin = L)
00000011b (CNVSS pin = H)
Bit Name
b1 b0
(4)
0 0: Single-chip mode
0 1: Memory expansion mode
1 0: Do not set
1 1: Microprocessor mode
(2)
0 : RD,BHE,WR
1 : RD,WRH,WRL
Setting this bit to "1" resets the
microcomputer. When read, its content
is "0".
b5 b4
0 0 : Multiplexed bus is unused
(2)
(Separate bus in the entire CS
space)
0 1 : Allocated to CS2 space
1 0 : Allocated to CS1 space
1 1 : Allocated to the entire CS space
0 : Address output
(2)
1 : Port function
(Address is not output)
0 : BCLK is output
1 : BCLK is not output
(2)
(Pin is left high-impedance)
7. Processor Mode
(4)
Function
RW
RW
RW
RW
RW
RW
RW
(3)
RW
RW
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