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M16C/62P Group (M16C/62P, M16C/62PT)
Table 1.3 Performance outline of M16C/62P group (M16C/62P, M16C/62PT) (80-pin version)
Item
CPU
Number of Basic Instructions
Minimum Instruction Execution Time 41.7ns(f(BCLK)=24MHz, VCC1=3.0 to 5.5V) 41.7ns(f(BCLK)=24MHz, VCC1=4.0 to 5.5V)
Operation Mode
Memory Space
Memory Capacity
Peripheral
Port
function
Multifunction Timer
Serial I/O
A/D Converter
D/A Converter
DMAC
CRC Calculation Circuit
Watchdog Timer
Interrupt
Clock Generating Circuit
Oscillation Stop Detection Function Stop detection of main clock oscillation, re-oscillation detection function
Voltage Detection Circuit
Electric
Supply Voltage
characteris-
tics
Power Consumption
Program/Erase Supply Voltage 3.3 ± 0.3 V or 5.0 ± 0.5 V
Flash
memory
Program and Erase Endurance
Version
Operating Ambient Temperature
Package
NOTES :
2
1. I
C bus is a registered trademark of Koninklijke Philips Electronics N. V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
3. See Table 1.8 and 1.9 Product Code for the program and erase endurance, and operating ambient temperature.
In addition 1,000 times/10,000 times are under development as of Sep., 2004. Please inquire about a release schedule.
4. All options are on request basis.
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
91 instructions
100ns(f(BCLK)=10MHz, VCC1=2.7 to 5.5V)
Single-chip mode
1 Mbyte
See Table 1.4 to 1.7 Product List
Input/Output : 70 pins, Input : 1pin
Timer A : 16 bits x 5 channels (Timer A1 and A2 are internal timer)
Timer B : 16 bits x 6 channels (Timer B1 is internal timer)
2 channels
Clock synchronous, UART,
2
I
1 channel
Clock synchronous,
2
I
C bus
2 channels
Clock synchronous (1 channel is only for transmission)
10-bit A/D converter: 1 circuit, 26 channels
8 bits x 2 channels
2 channels
CCITT-CRC
15 bits x 1 channel (with prescaler)
Internal: 29 sources, External: 5 sources, Software: 4 sources,
Priority level: 7 levels
4 circuits
Main clock generation circuit (*),
Subclock generation circuit (*),
On-chip oscillator, PLL synthesizer
(*)Equipped with a built-in feedback resistor.
Available (option
VCC1=3.0 to 5.5V, (f(BCLK)=24MHz)
VCC1=2.7 to 5.5V, (f(BCLK)=10MHz)
14 mA (VCC1=5V, f(BCLK)=24MHz) 14 mA (VCC1=5V, f(BCLK)=24MHz)
8 mA (VCC1=3V, f(BCLK)=10MHz) 2.0 µA (VCC1=5V,
1.8 µA (VCC1=3V,
f(XCIN)=32kHz, wait mode)
0.7 µ A (VCC1=3V, stop mode)
100 times (all area)
or 1,000 times (user ROM area without block 1)
/ 10,000 times (block A, block 1)
–20 to 85
–40 to 85
80-pin plastic mold QFP
page 4
f o
3
6
4
M16C/62P
(1)
(2)
C bus
, IEBus
(1)
(2)
, IEBus
(4)
)
o
C
o
C(option)
Performance
M16C/62PT
Absent
VCC1=4.0 to 5.5V, (f(BCLK)=24MHz)
f(XCIN)=32kHz, wait mode)
0.8 µ A (VCC1=5V, stop mode)
5.0 ± 0.5 V
(3)
o
T version : –40 to 85
V version : –40 to 125
1. Overview
C
o
C
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