Table of Contents
Advertisement
M16C/62P Group (M16C/62P, M16C/62PT)
Table 25.2 Technical Update Applicable Table of M16C/62P Flash and ROM External Versions (2)
When supplying power to the microcomputer, the power supply voltage
applied to the VCC1 pin must meet the conditions of SVCC.
Do not set the CM10 bit in the CM1 register to "1" (stop mode) with
setting the VC13 bit in the VCR1 register to "1" (VCC1≥Vdet 4) when a
voltage down detection interrupt in the voltage detection circuit is used
under the following settings:
• the VC27 bit in the VCR2 register to "1" (voltage down detection circuit
enabled)
• the D40 bit in the D4INT register to "1" (voltage down detection
interrupt enabled)
• the D41 bit to "1" (use voltage down detection interrupt to exit stop
mode)
_______
Do not generate the NMI interrupt after setting the CM10 bit in the CM1
register to "1" (stop mode) and entering stop mode.
Do not set the CM10 bit in the CM1 register to "1" (stop mode) when the
microcomputer is in low-speed mode under the following settings:
• the CM04 bit in the CM0 register is set to "1" (sub clock oscillation)
• the CM07 bit in the CM0 register is set to "1" (sub clock)
When using the sub clock (XCIN-XCOUT) as the CPU clock (BCLK) or
as the timer count source, DO NOT leave the CM03 bit set to "1" (XCIN-
XCOUT drive capacity "HIGH" ).
O
: Applies
–
: Does not apply
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
Precaution
page 358
f o
3
6
4
25. Differences Depending on Manufacturing Period
A
O
O
O
O
O
TECHNICAL
Chip version
B
C
UPDATE
–
–
TN-M16C-116-0311
–
–
TN-M16C-107-0309
Precaution 1.1
–
–
TN-M16C-107-0309
Precaution 1.2
–
–
TN-M16C-107-0309
Precaution 1.3
O
–
TN-M16C-119A/EA
Advertisement
Table of Contents
