Mmc_Argh Register (Mmc_Argh); Mmc_Argl Register (Mmc_Argl); Mmc_Argh Bit Definitions; Mmc_Argl Bit Definitions - Intel PXA255 Developer's Manual

Table 15-18. Command Index Values (Sheet 3 of 3)
CMD
INDEX
111001
111010
111011
111100
111101
111110
111111
15.5.14

MMC_ARGH Register (MMC_ARGH)

MMC_ARGH, shown in
command.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.
Table 15-19. MMC_ARGH Bit Definitions
Physical Address
0x4110_0034
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Reset 0 0 0 0 0 0
Bits Name
31:16
15:0 ARG_H
15.5.15

MMC_ARGL Register (MMC_ARGL)

MMC_ARGL, shown in
command.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.
Table 15-20. MMC_ARGL Bit Definitions
Physical Address
0x4110_0038
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Reset 0 0 0 0 0 0
Bits Name
31:16
15:0 ARG_L
Intel® PXA255 Processor Developer's Manual
COMM
MODE
AND
CMD57 reserved
CMD58 SPI READ_OCR
CMD59 SPI CRC_ON_OFF
CMD60 MMC reserved for manufacturer
CMD61 MMC reserved for manufacturer
CMD62 MMC reserved for manufacturer
CMD63 MMC reserved for manufacturer
Table 15-19, specifies the upper 16 bits of the argument for the current
MMC_ARGH Register
reserved
0 0 0 0 0 0 0
— reserved
Upper 16 bits of command argument
Table 15-20, specifies the lower 16 bits of the argument in the current
MMC_ARGL Register
reserved
0 0 0 0 0 0 0
— reserved
Lower 16 bits of command argument
ABBREVIATION
0 0 0 0 0 0 0 0
Description
0 0 0 0 0 0 0 0
Description
MultiMediaCard Controller
MultiMediaCard Controller
8 7 6 5 4 3
ARG_H
0 0 0 0 0 0 0 0
MultiMediaCard Controller
8 7 6 5 4 3
ARG_L
0 0 0 0 0 0 0 0
2 1 0
0 0 0
2 1 0
0 0 0
15-35