Intel PXA255 Developer's Manual page 58

Intel computer hardware user manual

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System Architecture

Table 2-8. System Architecture Register Address Summary (Sheet 8 of 12)

ICP Control Register 0

ICP Control Register 1

ICP Control Register 2

ICP Data Register

ICP Status Register 0

ICP Status Register 1

RTC Count Register

RTC Alarm Register

RTC Status Register

RTC Timer Trim Register

OS Timer Match registers<3:0>

OS Timer Counter Register

OS Timer Status Register

OS Timer Watchdog Enable Register

OS Timer Interrupt Enable Register

PWM 0 Control Register

PWM 0 Duty Cycle Register

PWM 0 Period Control Register

PWM 1Control Register

PWM 1 Duty Cycle Register

PWM 1 Period Control Register

Interrupt Controller IRQ Pending Register

Interrupt Controller Mask Register

Interrupt Controller Level Register

Interrupt Controller FIQ Pending Register

Interrupt Controller Pending Register

Interrupt Controller Control Register

GPIO Pin-Level Register GPIO<31:0>

GPIO Pin-Level Register GPIO<63:32>

Intel® PXA255 Processor Developer's Manual

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