Intel PXA255 Developer's Manual page 324

Synchronous Serial Port Controller
Figure 8-4. Motorola SPI* Frame Formats for SPO and SPH Programming
SSPRXD
SSPSCLK
SSPSCLK
SSPSFRM
SSPTXD
SSPRXD
8.7.2.6 Microwire Transmit Data Size (MWDS)
The Microwire Transmit Data Size (MWDS) bit is used to select the 8- or 16-bit size for command
word transmissions in the National Microwire frame format. When the MWDS is set to "0", 8-bit
command words are transmitted. When the MWDS is set to "1", 16-bit command words are
transmitted. The MWDS setting is ignored for all other frame formats.
8.7.2.7 Transmit FIFO Interrupt/DMA Threshold (TFT)
This 4-bit value sets the level at or below which the FIFO controller triggers a DMA service
request and, if enabled, an interrupt request. Refer to
associated with DMA servicing.
8.7.2.8 Receive FIFO Interrupt/DMA Threshold (RFT)
This 4-bit value sets the level at or above which the FIFO controller triggers a DMA service
interrupt and, if enabled, an interrupt request. Refer to
associated with DMA servicing.
Be careful not to set the RFT value too high for your system or the FIFO could overrun because of
the bus latencies caused by other internal and external peripherals. This is especially the case for
interrupt and polled modes that require a longer time to service.
8-14
Bit<N>
MSB
SPO=0
SPO=1
Bit<N>
Bit<N>
MSB
Bit<N-
... Bit<1> Bit<0>
1>
4 to 16 Bits LSB
SPH = 0
...
...
...
Bit<N-
... Bit<1> Bit<0>
1>
Bit<N-
... Bit<1> Bit<0>
1>
4 to 16 Bits LSB
SPH = 1
Table 8-4
Table 8-4
Intel® PXA255 Processor Developer's Manual
for suggested TFT values
for suggested RFT values