Intel PXA255 Developer's Manual page 59

Intel computer hardware user manual
Hide thumbs Also See for PXA255:
Table of Contents

Advertisement

Table 2-8. System Architecture Register Address Summary (Sheet 9 of 12)
Unit
Address
0x40E0_0008
0x40E0_000C
0x40E0_0010
0x40E0_0014
0x40E0_0018
0x40E0_001C
0x40E0_0020
0x40E0_0024
0x40E0_0028
0x40E0_002C
0x40E0_0030
0x40E0_0034
0x40E0_0038
0x40E0_003C
0x40E0_0040
0x40E0_0044
0x40E0_0048
0x40E0_004C
0x40E0_0050
0x40E0_0054
0x40E0_0058
0x40E0_005C
0x40E0_0060
0x40E0_0064
0x40E0_0068
Power
Manager and
0x40F0_0000
Reset
Control
0x40F0_0000
0x40F0_0004
0x40F0_0008
0x40F0_000C
0x40F0_0010
0x40F0_0014
0x40F0_0018
0x40F0_001C
0x40F0_0020
0x40F0_0024
0x40F0_0028
0x40F0_002C
Intel® PXA255 Processor Developer's Manual
Register Symbol
GPLR2
GPIO Pin-Level Register GPIO<80:64>
GPDR0
GPIO Pin Direction Register GPIO<31:0>
GPDR1
GPIO Pin Direction Register GPIO<63:32>
GPDR2
GPIO Pin Direction Register GPIO<80:64>
GPSR0
GPIO Pin Direction Register GPIO<31:0>
GPSR1
GPIO Pin Output Set Register GPIO<63:32>
GPSR2
GPIO Pin Output Set Register GPIO<80:64>
GPCR0
GPIO Pin Output Clear Register GPIO<31:0>
GPCR1
GPIO Pin Output Clear Register GPIO <63:32>
GPCR2
GPIO Pin Output Clear Register GPIO <80:64>
GRER0
GPIO Rising-Edge Detect Register GPIO<31:0>
GRER1
GPIO Rising-Edge Detect Register GPIO<63:32>
GRER2
GPIO Rising-Edge Detect Register GPIO<80:64>
GFER0
GPIO Falling-Edge Detect Register GPIO<31:0>
GFER1
GPIO Falling-Edge Detect Register GPIO<63:32>
GFER2
GPIO Falling-Edge Detect Register GPIO<80:64>
GEDR0
GPIO Edge Detect Status Register GPIO<31:0>
GEDR1
GPIO Edge Detect Status Register GPIO<63:32>
GEDR2
GPIO Edge Detect Status Register GPIO<80:64>
GAFR0_L
GPIO Alternate Function Select Register GPIO<15:0>
GAFR0_U
GPIO Alternate Function Select Register GPIO<31:16>
GAFR1_L
GPIO Alternate Function Select Register GPIO<47:32>
GAFR1_U
GPIO Alternate Function Select Register GPIO<63:48>
GAFR2_L
GPIO Alternate Function Select Register GPIO<79:64>
GAFR2_U
GPIO Alternate Function Select Register GPIO 80
PMCR
Power Manager Control Register
PSSR
Power Manager Sleep Status Register
PSPR
Power Manager Scratch Pad Register
PWER
Power Manager Wake-up Enable Register
PRER
Power Manager GPIO Rising-Edge Detect Enable Register
PFER
Power Manager GPIO Falling-Edge Detect Enable Register
PEDR
Power Manager GPIO Edge Detect Status Register
PCFR
Power Manager General Configuration Register
PGSR0
Power Manager GPIO Sleep State Register for GP[31-0]
PGSR1
Power Manager GPIO Sleep State Register for GP[63-32]
PGSR2
Power Manager GPIO Sleep State Register for GP[84-64]
Reserved
System Architecture
Register Description
2-29

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents