Sdram_Write; Sdram 4-Beat Read/ 4-Beat Write To Different Partitions - Intel PXA255 Developer's Manual

Figure 6-9. SDRAM_write
0ns
tRP = 2 clks
tRCD = 2 clks
tRAS = 2 clks
CL = 2 clks
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]
Figure 6-10. SDRAM 4-Beat Read/ 4-Beat Write To Different Partitions
SDCLK[1]
SDCKE[1]
command
nSDCS
nSDRAS
nSDCAS
MA[24:10]
nWE
MD[31:0]
DQM[3:0]
RDnWR
Intel® PXA255 Processor Developer's Manual
25ns
tRCD tRCD
row col
0
mask0
DTC=00, CL = 2, tRP = 1 clk, tRCD = 1 clk
read(0) pre(1) act(1)
0 1
col bank row
rd0_0 rd0_1
0000
50ns
CL CL
1 2 3
mask1 mask2 mask3
nop
rd0_2 rd0_3
Memory Controller
75ns
write(1) nop
1
col
wd1_0 wd1_1 wd1_2 wd1_3
mask0 mask1 mask2 mask3
mask data bytes
6-31