Register Memory Map - Intel PXA255 Developer's Manual

Inter-Integrated-Circuit Sound (I2S) Controller
Table 14-12. Register Memory Map
Address
(paddr(9:0)
0x4040_0000
0x4040_0004
0x4040_0008
0x4040_000C
0x4040_0014
0x4040_0018
0x4040_001C
through
0x4040_005C
0x4040_0060
0x4040_0064
through
0x4040_007C
0x4040_0080
14-16
Register
Description
name
SACR0 Global Control Register
SACR1 Serial Audio I
— reserved
SASR0 Serial Audio I
SAIMR Serial Audio Interrupt Mask Register
SAICR Serial Audio Interrupt Clear Register
— reserved
SADIV Audio clock divider register. See
— reserved
SADR Serial Audio Data Register (TX and RX FIFO access register).
2
S/MSB-Justified Control Register
2
S/MSB-Justified Interface and FIFO Status Register
Section 14.4.
Intel® PXA255 Processor Developer's Manual