Intel PXA255 Developer's Manual page 22

15-7 MMC_CLK Bit Definitions ......................................................................................................15-25
15-8 MMC_SPI Bit Definitions .......................................................................................................15-25
15-9 MMC_CMDAT Bit Definitions ................................................................................................15-26
15-10 MMC_RESTO Bit Definitions.................................................................................................15-27
15-11 MMC_RDTO Register ...........................................................................................................15-28
15-12 MMC_BLKLEN Bit Definitions ...............................................................................................15-29
15-13 MMC_NOB Bit Definitions .....................................................................................................15-29
15-14 MMC_PRTBUF Bit Definitions...............................................................................................15-30
15-15 MMC_I_MASK Bit Definitions................................................................................................15-30
15-16 MMC_I_REG Bit Definitions ..................................................................................................15-32
15-17 MMC_CMD Register .............................................................................................................15-33
15-18 Command Index Values ........................................................................................................15-33
15-19 MMC_ARGH Bit Definitions...................................................................................................15-35
15-20 MMC_ARGL Bit Definitions ...................................................................................................15-35
15-21 MMC_RES, FIFO Entry .........................................................................................................15-36
15-22 MMC_RXFIFO, FIFO Entry ...................................................................................................15-36
15-23 MMC_TXFIFO, FIFO Entry....................................................................................................15-37
15-24 MMC Controller Registers .....................................................................................................15-37
16-1 SSP Serial Port I/O Signals .....................................................................................................16-2
16-2 Programmable Serial Protocol (PSP) Parameters ................................................................16-12
16-3 SSCR0 Bit Definitions............................................................................................................16-19
16-4 SSCR1 Bit Definitions............................................................................................................16-21
16-5 SSPSP Bit Definitions............................................................................................................16-23
16-6 SSTO Bit Definitions..............................................................................................................16-24
16-7 SSITR Bit Definitions .............................................................................................................16-25
16-8 SSSR Bit Definitions..............................................................................................................16-26
16-9 SSDR Bit Definitions..............................................................................................................16-29
16-10 NSSP Register Address Map ................................................................................................16-29
17-1 UART Signal Descriptions .......................................................................................................17-3
17-2 RBR Bit Definitions ................................................................................................................17-10
17-3 THR Bit Definitions ................................................................................................................17-10
17-4 DLL Bit Definitions .................................................................................................................17-11
17-5 Divisor Latch Register High (DLH) Bit Definitions .................................................................17-11
17-6 IER Bit Definitions..................................................................................................................17-12
17-7 Interrupt Conditions ...............................................................................................................17-13
17-8 IIR Bit Definitions ...................................................................................................................17-13
17-9 Interrupt Identification Register Decode ................................................................................17-14
17-10 FCR Bit Definitions ................................................................................................................17-15
17-11 FOR Bit Definitions ................................................................................................................17-16
17-12 ABR Bit Definitions ................................................................................................................17-17
17-13 ACR Bit Definitions ................................................................................................................17-18
17-14 LCR Bit Definitions ................................................................................................................17-18
17-15 LSR Bit Definitions.................................................................................................................17-20
17-16 MCR Bit Definitions ...............................................................................................................17-22
17-17 MSR Bit Definitions................................................................................................................17-23
17-18 SCR Bit Definitions ................................................................................................................17-24
17-19 ISR Bit Definitions..................................................................................................................17-25
17-20 HWUART Register Locations ................................................................................................17-25