Express chipset, ich chipset based m/b for lga 775 core 2 duo processor (66 pages)
Summary of Contents for Intel PXA27x
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® Intel PXA27x Processor Developer’s Kit User’s Guide April 2004 Revision 4.001 Order Number: 278827-005...
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Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation.
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PXA27x Processor Developer’s Kit Main Board........15 Main Board and Daughter Card functionality................16 ® Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Top ......... 17 ® Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Bottom ......18 ®...
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Contents 19 LEDDAT2 Bit Definitions ......................54 20 LEDCTRL Bit Definitions ......................55 21 GPSWR Bit Definitions ....................... 56 22 MSCWR1 Bit Definitions......................57 23 MSCWR2 Bit Definitions......................59 24 MSCWR3 Bit Definitions......................60 25 MSCRD Bit Definitions ....................... 61 26 INTMSKEN Bit Definitions High Bits...................
PXA27x Processor Developer’s Kit Daughter Card (daughter card), which can either dock with the main board or operate independently ® • Intel PXA27x Processor Card (processor card), which is a board to allow for field upgrades to the kit system as new steppings of silicon arrive. ® • Intel PXA27x Processor Developer’s Kit Power Manager Integrated Circuit (Low DropOut)
Agilent ADM-2650 VGA Camera module http://www.agilent.com Intel ® flash memory devices http://developer.intel.com ® The Intel JTAG Cable that is provided with this kit can only be used with the Intel PXA27x Processor Developer’s Kit. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
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® Intel PXA27x Processor Family Developer’s Manual ® For order numbers, see the Intel ® Intel PXA27x Processor Developer’s Kit Quick Start Guide PXA27x Processor Developer’s Kit ® Intel PXA27x Processor Developer’s Kit Parts List Quick Start Guide ® Intel PXA27x Processor Developer’s Kit Schematics...
• Section 2.2 — Intel® PXA27x Processor Developer’s Kit Main Board ® The Intel PXA27x Processor Developer’s Kit Main Board (main board) serves as the ® docking station for an Intel PXA27x Processor Developer’s Kit Daughter Card (daughter card) to make it easier for you to develope many different types of applications. The main board features peripheral devices, sockets for various expansion cards, extensive input/output (I/O) capability, and user-interface aids.
In most cases, however, the optimal use of a device requires detailed reference to the device manufacturer’s data sheet. To locate this information, refer to Table 1, “Supplemental Documentation” on page ® Using this kit effectively requires a sound knowledge of the Intel XScale technology and the ® ®...
Synchronous serial protocol (SSP) headers • 10/100 Mbps Ethernet* controller • Universal Subscriber Identity Module* (USIM) • Standard I C header • IrDA infrared transceiver, capable of fast (FIR) and slow (SIR) modes ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
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8-digit, seven-segment hex LED display Figure 2 shows the main board’s organization in a block diagram. Figure 3 through Figure 6 show the main board’s layout and the locations of all user-related items. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
I2C Header SSP Header LCD Connector * This device interface can be muxed (to Communication Processor or Application Processor) Other names and brands may be claimed as property of others. B1546-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
® Figure 4. Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Top ECO Sticker Note: The “2” in J12 was inadvertently left off during the silkscreening of J12, causing it to appear as “J1” in Circuit Revision 2.1 of the main board. J1 is the processor USB Client connector and is located near the covered J4 USB host 0 connector, while J12 is a reserved USB Client connector, and is located near the J13 USB On the Go (OTG) connector.
J42 on the main board accepts +12 VDC from the power adapter. The main board uses Linear Technologies regulators to supply the 2.5 VDC, 3.3 VDC, 5 VDC, and ® 12 VDC power domains. The main board can also supply power to the Intel PXA270 Processor (see Section 2.3.1).
Bank Controller B1728-01 2.2.2.2 Initiating Reset To initiate a system reset, use any of the following methods: Press the momentary reset switch on the PMIC card to reset the entire system. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
The default bus width for both the main board and processor card’s flash-memory banks is 32 bits. ® The main board flash-memory bank, but not the Synchronous Intel StrataFlash Wireless memory (L18) processor card flash-memory bank, can optionally be set to operate on a 16-bit bus. If it is necessary to boot using a 16-bit bus, two switches must be changed, as follows.
Section 2.1). Connector J17 connects the LCD panel to the processor card’s LCD Controller. Other displays can ® serve in place of the Toshiba panel. For programming information, see the Intel PXA27x Processor Family Developer’s Manual. 2.2.7 Universal Serial Bus Host and Client The main board provides a Type A connector for the host and a Type B connector for the client.
The Philips UCB1400* codec supports 20-bit stereo audio with programmable sampling rate, input and output gain control, and digital sound processing. The UCB1400 provides the following features in addition to the codec: • Touch-screen controller ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
Philips data sheet for instructions on using the interrupt. • General-purpose I/O (GPIO) pins, programmable via the AC’97 interface. For more ® information on using this GPIO, refer to the Philips data sheet and to the Intel PXA270 Processor schematic diagram. 2.2.11 Touch-Screen Controllers The kit supports the Philips UCB1400 codec board touch screen controllers.
2.2.14 Memory Stick* and Socket ® The Sony Memory Stick* socket connects to the Intel PXA270 Processor Memory Stick controller. It is multiplexed with the SD/SDIO/MMC controller, so only one may be used at a time. Note: The Memory Stick* is properly installed in the socket when the contacts are face up.
® the Intel PXA270 Processor. ® This header is enabled by the daughter card SW1.3. In the ON position the processor’s Intel signals are routed to this Baseband Header. 2.2.19 Logic Analyzer Connectors A set of Mictor-38 logic-analyzer connectors provide access to the major platform and processor signals, including address and data buses, PCMCIA, serial-bus transmit and receive lines, reset, AC’97, MMC, and LCD.
For pin assignments, see the kit main board schematic diagram. • To identify a connector’s type, see the main board parts list. ® Table 2. Connectors, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 1 of 3) Designator Name USB client Ethernet USB host 1 (reserved) USB host 0...
LED indicators on the main board. See Figure 6 for their locations. ® Table 4. LED Indicators, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 1 of 2) Designator Function Notes Color 4 least-significant hex digits User read/writable...
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® Table 4. LED Indicators, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 2 of 2) Designator Function Notes Color PCMCIA slot 0 power indicator PCMCIA slot 1 power indicator General purpose, D8-D12 Discrete LED[0:4] Green user-writable 1.8V power indicator...
I2C Header SSP Header LCD Connector * This device interface can be muxed (to Communication Processor or Application Processor) Other names and brands may be claimed as property of others. B1546-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
To power the Intel PXA270 Processor from the main board, install jumpers ® on J22 between pins 1 and 3, and between pins 2 and 4 (see the Intel main board PXA270 Processor schematic diagram). This is the default setting for J22.
Two JTAG connectors, the in-circuit emulation (ICE) connector and a stake pin header, provide the ® interface for devices on the JTAG chain, such as the main board and Intel PXA270 Processor CPLDs, the main board FPGA, and the daughter card. For details of the JTAG interface, see Section 2.3.9...
Caution: While power is on, do not change any of the jumpers listed in Table Table 8. Jumper Headers, for the Processor Card Designator Name Default Reserved Reserved Reserved Shunted (accepts power main board +5V Supply Jumper from the main board) ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
LED indicators on the daughter card. See Figure 6 for their locations. Table 10. LED Indicators, Daughter Card Designator Description Color nRESET_OUT D2-5 Power Indicator LEDs controlled by PMIC Green ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
Two SDRAM chips, soldered to the card, supply 32 Mbytes of synchronous, dynamic, ® random-access memory. This SDRAM maps to the Intel PXA270 Processor Chip Select ® nSDCS0. For more information, refer to the Memory Controller chapter in the Intel PXA27x Processor Family Developer’s Manual. 2.4.2 Flash Memory ®...
Logic Devices” on page 2.4.3 Clock Sources ® By default, the on-card 13 MHz crystal connects to the Intel PXA270 Processor’s PXTAL_IN input, and the on-card 32.768 kHz crystal connects to the processor’s TXTAL_IN input. This ® arrangement uses the Intel PXA270 Processor’s on-chip PLL (phase locked loop).
2.5.2 PMIC Card Jumper Settings The diagram below illustrates the jumper settings of the PMIC card. The diagram also illustrates the functionality of the jumpers. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
See the low-level initialization code in your Board Support Package for the exact values used. Memory Map and Chip Selects ® Table 13 describes the physical addresses and active-low chip selects for the Intel PXA27x ® Processor Card (processor card). For a complete listing of the Intel PXA270 Processor memory ®...
Table 2. Enable the GPIO pin inputs by clearing the read disable hold (RDH) bit in the Intel® PXA270 Processor Power Manager Sleep Status Register. 3. Read the system configuration information from the GPIO virtual data pins listed in Table Save it as the system configuration word (SCR).
Status of main board switch SW2: ® 0 = DOT position — nCS0 connects to Intel PXA270 Processor flash memory; ® nCS1 to main board flash memory. The system boots from the Intel PXA270 SWAP_ Processor bank. FLASH 1 = NO DOT position — nCS0 connects to main board flash memory; nCS1 to ®...
Control the seven-segment LED dots for HEX1: HEX1Lx 0 = dot ON 1 = dot OFF Control the seven-segment LED dots for HEX0: HEX0Lx 0 = dot ON 1 = dot OFF ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
1 = amplifier shut down Radio module power control: RADIO_PWR 0 = power off 1 = power on Radio module wake-up signal: RADIO_ 0 = wake deasserted WAKE 1 = wake asserted ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
VDD voltage sense signal / card status changed BVD1 Sx_nVS[2:1] VSS voltage sense signals Card detection signal: Sx_nCD 0 = Card is fully inserted. 1 = Card is not fully inserted or is not present. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
† † † † † † † † Reset Bits Name Access Description 15:0 REVID Revision ID of the FPGA (X.YZ) † Value determined by Revision of the FPGA Code resident. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
Section 3.3.2 — LCD-Control Registers ® For complete details of these processor registers, see the corresponding chapter in the Intel PXA27x Processor Family Developer’s Manual. Note: In the following tables, ‘X’ means that a bit’s setting does not matter (“don’t care”) for basic kit system operation.
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PXA270 Processor Core Clock Configuration Register. See the Clocks and Power ® Manager chapter in the Intel PXA27x Processor Family Developer’s Manual.) ® • Use of fast-bus mode (see the Clocks and Power Manager chapter in the Intel PXA27x Processor Family Developer’s Manual) ® • Expansion-card presence (see Section 3.2.1.1) and memory-bus configuration (Intel...
“Flash Memory” on page 43. See also the kit parts lists. ® For more information on the APD function, see the MDREFR register description in the Memory Controller chapter of the Intel PXA27x Processor Family Developer’s Manual . 3. SDCLK1 = 65 MHz 4.
NOTES: ® 1. These values are based upon the main board switch SW2 (SWAP_FLASH) being set to DOT (nCS0 = Intel PXA270 Processor flash). If SWAP_FLASH is set to NO-DOT (nCS0 = main board flash), then the upper and lower halves of this register must be swapped.
Static Memory Control Register 1 (MSC1) ® Static chip select nCS2 is logically split across two devices: the SRAM on the Intel PXA270 Processor and the FPGA on the main board. The timing values shown in the following table are for the slowest device —...
000 0000 ® † These values are based upon the main board switch SW2 (SWAP_FLASH) being set to DOT (nCS0 = Intel PXA270 Processor flash). If SWAP_FLASH is set to NO-DOT (nCS0 = main board flash), then the values of these bits must be swapped.
Custom clock configurations: — Clock sources — Run- and turbo-mode frequencies — Use of fast-bus mode ® For clock-configuration information, see the Clocks and Power Manager chapter in the Intel PXA27x Processor Family Developer’s Manual. • Presence of an alternate LCD 3.3.2.1...
(USB client), card detection (PCMCIA, USIM), miscellaneous PCMCIA interrupts, and main board switch SW12. ® Note: Do not confuse the platform-level interrupts with the Intel PXA270 Processor interrupts, which ® are described in the Intel PXA27x Processor Family Developer’s Manual.
63). To enable the interrupt, set its bit. For more information about the peripherals and their interrupts, refer to the manufacturer’s data sheet. ® Figure 13. Intel PXA27x Processor Developer’s Kit Interrupt Scheme A regXXXSetClr Data(X) nWE_Rise nFpgaRst reglntSetClr(X) regXXXRiseDet...
PXA270 Processor GPIO pins, as shown in Table ® For instructions on programming the GPIO pins, refer to the GPIO chapter in the Intel PXA27x Processor Family Developer’s Manual. Note: In the table, the direction shown is relative to the processor.
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Baseband wait indicator for outbound link / PCMCIA PCMCIA_nPCE[1] nPREG / PCMCIA attribute space select / baseband inbound data bit BB_IB_DAT1 nPWAIT / PCMCIA interface wait / baseband inbound data bit BB_IB_DAT2 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
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LCD data line / PCMCIA PCMCIA_nPCE[2] USBHPWR0 / USB host over-current indicator / SSP2 Frame Sync SSPFRM2 USBHPEN0 USB host control for power ports URST / CIF_DD[4] USIM card reset / Camera Interface Data ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
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UVS0 / CIF_DD[1] USIM voltage level control / Camera Interface Data U_EN / CIF_DD[3] USIM enable / Camera Interface Data U_DET / CIF_DD[2] USIM detect / Camera Interface Data C clock C data ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
Programming the CPLDs or the FPGA configuration EEPROM requires that the specific programming files be installed on the host computer. To obtain these files, contact the appropriate Intel field sales representative (see Intel’s web site at www.intel.com for a list of the representatives).
After programming is complete, return the kit to normal operation by turning off kit power. 3.6.2 CPLD1 (Processor Card) ® CPLD1 contains the logic for controlling the Intel PXA270 Processor memory-bus transceivers, memory mapping, and JTAG chaining. Programming CPLD1 requires that the most recent version of the Xilinx programming file...
2. Turn off power to the kit. 3. Return SW2.1 and SW2.2 to the default ON position. ® Caution: Disconnect the JTAG cable from the Intel PXA270 Processor to avoid damage to the kit. 3.6.4 FPGA Configuration EEPROM (Main Board) U15 on the main board contains the configuration data for the field-programmable gate array (FPGA), which includes the platform registers and interrupts.
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1. Exit the XPLA programming software. 2. Turn off power to the kit. 3. Return SW2.1 and SW2.2 to its default ON position. ® Caution: Disconnect the JTAG cable from the Intel PXA270 Processor to avoid damage to the kit. ® Intel...