Intel PXA27x User Manual
Intel PXA27x User Manual

Intel PXA27x User Manual

Developer’s kit
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Intel
PXA27x Processor
Developer's Kit
User's Guide
April 2004
Revision 4.001
Order Number: 278827-005

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Summary of Contents for Intel PXA27x

  • Page 1 ® Intel PXA27x Processor Developer’s Kit User’s Guide April 2004 Revision 4.001 Order Number: 278827-005...
  • Page 2 Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation.
  • Page 3: Table Of Contents

    Getting Started........................8 Related Documents ......................8 Hardware Description ......................... 11 User-Interface Panel ......................12 ® Intel PXA27x Processor Developer’s Kit Main Board ............13 2.2.1 Power Input and Voltage Regulation ..............21 2.2.2 System Reset ......................21 2.2.2.1 Structure and Operation................. 21 2.2.2.2...
  • Page 4 Connectors ......................40 2.3.10 Jumpers ......................... 41 2.3.11 Switches ........................ 42 2.3.12 LED Indicators ....................... 42 2.3.13 Test Points......................43 ® Intel PXA27x Processor Card................... 43 2.4.1 SDRAM........................43 2.4.2 Flash Memory ......................43 2.4.3 Clock Sources......................44 Power Management......................44 2.5.1...
  • Page 5 PXA27x Processor Developer’s Kit Main Board........15 Main Board and Daughter Card functionality................16 ® Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Top ......... 17 ® Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Bottom ......18 ®...
  • Page 6 Contents 19 LEDDAT2 Bit Definitions ......................54 20 LEDCTRL Bit Definitions ......................55 21 GPSWR Bit Definitions ....................... 56 22 MSCWR1 Bit Definitions......................57 23 MSCWR2 Bit Definitions......................59 24 MSCWR3 Bit Definitions......................60 25 MSCRD Bit Definitions ....................... 61 26 INTMSKEN Bit Definitions High Bits...................
  • Page 7: Introduction And Startup

    PXA27x Processor Developer’s Kit Daughter Card (daughter card), which can either dock with the main board or operate independently ® • Intel PXA27x Processor Card (processor card), which is a board to allow for field upgrades to the kit system as new steppings of silicon arrive. ® • Intel PXA27x Processor Developer’s Kit Power Manager Integrated Circuit (Low DropOut)
  • Page 8: Document Organization

    Agilent ADM-2650 VGA Camera module http://www.agilent.com Intel ® flash memory devices http://developer.intel.com ® The Intel JTAG Cable that is provided with this kit can only be used with the Intel PXA27x Processor Developer’s Kit. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 9 ® Intel PXA27x Processor Family Developer’s Manual ® For order numbers, see the Intel ® Intel PXA27x Processor Developer’s Kit Quick Start Guide PXA27x Processor Developer’s Kit ® Intel PXA27x Processor Developer’s Kit Parts List Quick Start Guide ® Intel PXA27x Processor Developer’s Kit Schematics...
  • Page 11: Hardware Description

    • Section 2.2 — Intel® PXA27x Processor Developer’s Kit Main Board ® The Intel PXA27x Processor Developer’s Kit Main Board (main board) serves as the ® docking station for an Intel PXA27x Processor Developer’s Kit Daughter Card (daughter card) to make it easier for you to develope many different types of applications. The main board features peripheral devices, sockets for various expansion cards, extensive input/output (I/O) capability, and user-interface aids.
  • Page 12: User-Interface Panel

    In most cases, however, the optimal use of a device requires detailed reference to the device manufacturer’s data sheet. To locate this information, refer to Table 1, “Supplemental Documentation” on page ® Using this kit effectively requires a sound knowledge of the Intel XScale technology and the ® ®...
  • Page 13: Intel ® Pxa27X Processor Developer's Kit Main Board

    Synchronous serial protocol (SSP) headers • 10/100 Mbps Ethernet* controller • Universal Subscriber Identity Module* (USIM) • Standard I C header • IrDA infrared transceiver, capable of fast (FIR) and slow (SIR) modes ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 14 8-digit, seven-segment hex LED display Figure 2 shows the main board’s organization in a block diagram. Figure 3 through Figure 6 show the main board’s layout and the locations of all user-related items. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 15: Block Diagram, Intel ® Pxa27X Processor Developer's Kit Main Board

    2.5V (FPGA / CPLD core) For asserting App Processor Main_3.15V EEPROM RJ45 VDD_BATT_FLT Main_5V (PCMCIA) SIM 1.8 / 3V Silent Wall Supply Jack Alert Header For EEPROM Test Quest control Switch Pads B1545-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 16: Main Board And Daughter Card Functionality

    I2C Header SSP Header LCD Connector * This device interface can be muxed (to Communication Processor or Application Processor) Other names and brands may be claimed as property of others. B1546-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 17: Connectors, Intel ® Pxa27X Processor Developer's Kit Main Board - Top

    ® Figure 4. Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Top ECO Sticker Note: The “2” in J12 was inadvertently left off during the silkscreening of J12, causing it to appear as “J1” in Circuit Revision 2.1 of the main board. J1 is the processor USB Client connector and is located near the covered J4 USB host 0 connector, while J12 is a reserved USB Client connector, and is located near the J13 USB On the Go (OTG) connector.
  • Page 18: Connectors, Intel ® Pxa27X Processor Developer's Kit Main Board - Bottom

    ® Figure 5. Connectors, Intel PXA27x Processor Developer’s Kit Main Board - Bottom ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 19: Switches, Intel ® Pxa27X Processor Developer's Kit Main Board

    ® Figure 6. Switches, Intel PXA27x Processor Developer’s Kit Main Board SW10 SW11 SW12 SW13 SW14 SW15 SW16 SW17 SW18 SW19 SW20 SW21 SW22 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 20: Leds, Intel ® Pxa27X Processor Developer's Kit Main Board

    ® Figure 7. LEDs, Intel PXA27x Processor Developer’s Kit Main Board ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 21: Power Input And Voltage Regulation

    J42 on the main board accepts +12 VDC from the power adapter. The main board uses Linear Technologies regulators to supply the 2.5 VDC, 3.3 VDC, 5 VDC, and ® 12 VDC power domains. The main board can also supply power to the Intel PXA270 Processor (see Section 2.3.1).
  • Page 22: Initiating Reset

    Bank Controller B1728-01 2.2.2.2 Initiating Reset To initiate a system reset, use any of the following methods: Press the momentary reset switch on the PMIC card to reset the entire system. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 23: Flash Memory And Boot Rom

    The default bus width for both the main board and processor card’s flash-memory banks is 32 bits. ® The main board flash-memory bank, but not the Synchronous Intel StrataFlash Wireless memory (L18) processor card flash-memory bank, can optionally be set to operate on a 16-bit bus. If it is necessary to boot using a 16-bit bus, two switches must be changed, as follows.
  • Page 24: Programmable Main Board Logic (Cpld2)

    Section 2.1). Connector J17 connects the LCD panel to the processor card’s LCD Controller. Other displays can ® serve in place of the Toshiba panel. For programming information, see the Intel PXA27x Processor Family Developer’s Manual. 2.2.7 Universal Serial Bus Host and Client The main board provides a Type A connector for the host and a Type B connector for the client.
  • Page 25: Audio Codecs

    The Philips UCB1400* codec supports 20-bit stereo audio with programmable sampling rate, input and output gain control, and digital sound processing. The UCB1400 provides the following features in addition to the codec: • Touch-screen controller ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 26: Touch-Screen Controllers

    Philips data sheet for instructions on using the interrupt. • General-purpose I/O (GPIO) pins, programmable via the AC’97 interface. For more ® information on using this GPIO, refer to the Philips data sheet and to the Intel PXA270 Processor schematic diagram. 2.2.11 Touch-Screen Controllers The kit supports the Philips UCB1400 codec board touch screen controllers.
  • Page 27: Multimediacard* / Secure Digital* Card

    2.2.14 Memory Stick* and Socket ® The Sony Memory Stick* socket connects to the Intel PXA270 Processor Memory Stick controller. It is multiplexed with the SD/SDIO/MMC controller, so only one may be used at a time. Note: The Memory Stick* is properly installed in the socket when the contacts are face up.
  • Page 28: Usim Connector

    ® the Intel PXA270 Processor. ® This header is enabled by the daughter card SW1.3. In the ON position the processor’s Intel signals are routed to this Baseband Header. 2.2.19 Logic Analyzer Connectors A set of Mictor-38 logic-analyzer connectors provide access to the major platform and processor signals, including address and data buses, PCMCIA, serial-bus transmit and receive lines, reset, AC’97, MMC, and LCD.
  • Page 29: Custom Expansion Card Connector

    • Table 3, “Switches and Settings, Intel® PXA27x Processor Developer’s Kit Main Board” on page 32 • Table 4, “LED Indicators, Intel® PXA27x Processor Developer’s Kit Main Board” on page 33 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 30: Connectors

    For pin assignments, see the kit main board schematic diagram. • To identify a connector’s type, see the main board parts list. ® Table 2. Connectors, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 1 of 3) Designator Name USB client Ethernet USB host 1 (reserved) USB host 0...
  • Page 31 ® Table 2. Connectors, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 2 of 3) Designator Name Graphics Accelerator Auxiliary LCD Header Discrete Switch Header Daughter card Secondary Connector Daughter card Primary Connector J29-31 Logic analyzer connectors SSP Header J33-35...
  • Page 32: Switches

    ® Table 2. Connectors, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 3 of 3) Designator Name audio card power select, 3V.: J61(1) – AUDIO_4P5V; J61(3) – VCCP_3V audio card power select, 3.15V: J62(1) – audio 3P15V; J62(3) – DC3P15V ®...
  • Page 33: Led Indicators

    LED indicators on the main board. See Figure 6 for their locations. ® Table 4. LED Indicators, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 1 of 2) Designator Function Notes Color 4 least-significant hex digits User read/writable...
  • Page 34 ® Table 4. LED Indicators, Intel PXA27x Processor Developer’s Kit Main Board (Sheet 2 of 2) Designator Function Notes Color PCMCIA slot 0 power indicator PCMCIA slot 1 power indicator General purpose, D8-D12 Discrete LED[0:4] Green user-writable 1.8V power indicator...
  • Page 35: Test Points

    NPCMCIA1_OE Yellow USIM_DET Black MMC_3P15V Yellow nPCMCIA0_DOE Black Yellow nPCMCIA1_DOE MS_3P15V Yellow DATA2_DIR DC_1P8V Yellow nDATA2_OE Yellow MSINS Black DC_12V_IN Yellow GPIO0 Yellow nMMC_CD Black Black Black Yellow MCC_WP White MXTEST_CLK ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 36: Intel ® Pxa27X Processor Developer's Kit Daughter Card

    ® Intel PXA27x Processor Developer’s Kit Daughter Card ® The Intel PXA27x Processor Developer’s Kit Daughter Card (daughter card) consists of the ® ® Intel PXA27x Processor Card (processor card), Intel PXA27x Processor Developer’s Kit Power Manager Integrated Circuit (Low DropOut) Card (PMIC card), SRAM, and nominal I/O capability.
  • Page 37: Block Diagram, Intel ® Pxa27X Processor Developer's Kit Daughter Card

    I2C Header SSP Header LCD Connector * This device interface can be muxed (to Communication Processor or Application Processor) Other names and brands may be claimed as property of others. B1546-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 38: Connectors, Intel ® Pxa27X Processor Developer's Kit Daughter Card

    Intel PXA27x Processor Developer’s Kit Daughter Card ® Intel PXA27x Processor Card ® Intel PXA27x Processor Developer’s Kit PMIC (LDO) Card J29 (on bottom of card) J30 (on bottom of card) ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 39: Power

    To power the Intel PXA270 Processor from the main board, install jumpers ® on J22 between pins 1 and 3, and between pins 2 and 4 (see the Intel main board PXA270 Processor schematic diagram). This is the default setting for J22.
  • Page 40: Jtag Interface

    Two JTAG connectors, the in-circuit emulation (ICE) connector and a stake pin header, provide the ® interface for devices on the JTAG chain, such as the main board and Intel PXA270 Processor CPLDs, the main board FPGA, and the daughter card. For details of the JTAG interface, see Section 2.3.9...
  • Page 41: Jumpers

    Caution: While power is on, do not change any of the jumpers listed in Table Table 8. Jumper Headers, for the Processor Card Designator Name Default Reserved Reserved Reserved Shunted (accepts power main board +5V Supply Jumper from the main board) ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 42: Switches

    LED indicators on the daughter card. See Figure 6 for their locations. Table 10. LED Indicators, Daughter Card Designator Description Color nRESET_OUT D2-5 Power Indicator LEDs controlled by PMIC Green ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 43: Test Points

    Two SDRAM chips, soldered to the card, supply 32 Mbytes of synchronous, dynamic, ® random-access memory. This SDRAM maps to the Intel PXA270 Processor Chip Select ® nSDCS0. For more information, refer to the Memory Controller chapter in the Intel PXA27x Processor Family Developer’s Manual. 2.4.2 Flash Memory ®...
  • Page 44: Clock Sources

    Logic Devices” on page 2.4.3 Clock Sources ® By default, the on-card 13 MHz crystal connects to the Intel PXA270 Processor’s PXTAL_IN input, and the on-card 32.768 kHz crystal connects to the processor’s TXTAL_IN input. This ® arrangement uses the Intel PXA270 Processor’s on-chip PLL (phase locked loop).
  • Page 45 1.104 1.397 1.089 1.383 1.074 1.368 1.060 1.353 1.045 1.339 1.030 1.323 1.016 1.309 1.001 1.294 0.986 1.280 0.972 1.265 0.957 1.251 0.942 1.236 0.928 1.221 1000 0.913 1.207 1023 0.899 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 46: Pmic Card Jumper Settings

    2.5.2 PMIC Card Jumper Settings The diagram below illustrates the jumper settings of the PMIC card. The diagram also illustrates the functionality of the jumpers. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 47: Programming Guide

    See the low-level initialization code in your Board Support Package for the exact values used. Memory Map and Chip Selects ® Table 13 describes the physical addresses and active-low chip selects for the Intel PXA27x ® Processor Card (processor card). For a complete listing of the Intel PXA270 Processor memory ®...
  • Page 48 0xAFFF_FFFF reserved — 256 Mbytes 0xB000_0000 0xBFFF_FFFF reserved — 256 Mbytes 0xC000_0000 0xCFFF_FFFF reserved — 256 Mbytes 0xD000_0000 0xDFFF_FFFF reserved — 256 Mbytes 0xE000_0000 0xEFFF_FFFF reserved — 256 Mbytes 0xF000_0000 0xFFFF_FFFF ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 49: Platform-Level Registers

    Section 3.2.2.8 — Miscellaneous Read Register 1 (MSCRD1) Memory-mapped Section 3.2.2.9 — Platform Interrupt Mask/Enable Register (INTMSKENA) Memory-mapped Section 3.2.2.10 — Platform Interrupt Set/Clear Register (INTSETCLR) Memory-mapped Section 3.2.2.11 — PCMCIA Socket 0/1 Status/Control Registers (PCMCIAx) Memory-mapped ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 50: Virtual Configuration Registers

    Table 2. Enable the GPIO pin inputs by clearing the read disable hold (RDH) bit in the Intel® PXA270 Processor Power Manager Sleep Status Register. 3. Read the system configuration information from the GPIO virtual data pins listed in Table Save it as the system configuration word (SCR).
  • Page 51: System Configuration Register (Scr)

    Status of main board switch SW2: ® 0 = DOT position — nCS0 connects to Intel PXA270 Processor flash memory; ® nCS1 to main board flash memory. The system boots from the Intel PXA270 SWAP_ Processor bank. FLASH 1 = NO DOT position — nCS0 connects to main board flash memory; nCS1 to ®...
  • Page 52: System Configuration Register 2 (Scr2)

    LCDID 0b000001 — Toshiba* LTM035A776C VGA, 18-bit, 666 RGB 0b000000 — Toshiba* LTM035A776C VGA, 16-bit, 565 RGB all others — reserved † Reset values depend on the display and orientation used. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 53: Memory-Mapped Main Board Registers

    19:16 DIGIT4 HEX1 digit 4 (U76) 15:12 DIGIT3 HEX0 digit 1 (U75) 11:8 DIGIT2 HEX0 digit 2 (U75) DIGIT1 HEX0 digit 3 (U75) DIGIT0 HEX0 digit 4 (U75) (least significant digit) ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 54: Hex Led Data Register 2 (Leddat2)

    Control the seven-segment LED dots for HEX1: HEX1Lx 0 = dot ON 1 = dot OFF Control the seven-segment LED dots for HEX0: HEX0Lx 0 = dot ON 1 = dot OFF ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 55: Led Control Register (Ledctrl)

    0 = LED on 1 = LED off LED7 = D9 LED6 = D8 LEDx LED5 = D7 LED4 = D6 LED3 = D5 LED2 = D4 LED1 = D3 LED0 = D2 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 56: General-Purpose Switch Register (Gpswr)

    GPSWT1 = SW15 GPSWT0 = SW14 HEXSWT1 Rotary switch SW13 setting — 4-bit hexadecimal value HEXSWT0 Rotary switch SW12 setting — 4-bit hexadecimal value † Reset values assume the states of the switches. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 57: Miscellaneous Write Register 1 (Mscwr1)

    00 — full distance power IrDA_MD 01 — shut down 10 — 2/3 distance power 11 — 1/3 distance power IrDA transceiver SIR/FIR control: IrDA_FIR 0 = SIR (slow) 1 = FIR (fast) ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 58 0 = D1 on 1 = D1 off PDC_CTL reserved Silent alert motor control: MTR_ON 0 = motor off 1 = motor on System reset: SYSRESET 0 = reset deasserted 1 = reset asserted ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 59: Miscellaneous Write Register 2 (Mscwr2)

    1 = amplifier shut down Radio module power control: RADIO_PWR 0 = power off 1 = power on Radio module wake-up signal: RADIO_ 0 = wake deasserted WAKE 1 = wake asserted ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 60: Miscellaneous Write Register 3 (Mscwr3)

    1 = Enable GPIO Reset from Software or from SW21 Initiate a GPIO Reset GPIO_RESET 0 = normal operation 1 = Initiate GPIO reset Communications Processor Reset control COMMS_SW_ 0 = normal operation RESET 1 = Assert Communications Processor reset ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 61: Miscellaneous Read Register 1 (Mscrd1)

    ADI7873 touch-screen digitizer busy: TS_BUSY 0 = false 1 = true Bluetooth* UART Data Set Ready: BTDSR 0 = false 1 = true Bluetooth* UART Ring Indicator: BTRI 0 = false 1 = true ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 62 0 = false 1 = true SD/MMC write-protect status: nMMC_WP 0 = Card is write-protected. 1 = Card is not write-protected. † Reset values depend on the states of the corresponding signals. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 63: Platform Interrupt Mask/Enable Register (Intmskena)

    PCMCIA socket 1 interrupt request (IRQ) S1_STSCHG PCMCIA socket 1 status changed S1_CD PCMCIA socket 1 card detection — — reserved S0_IRQ PCMCIA socket 0 IRQ S0_STSCHG PCMCIA socket 0 status changed ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 64 Memory Stick* detection PENIRQ ADI7873* touch-screen digitizer IRQ AC97 AC’97 CODEC IRQ ETHERNET Ethernet controller IRQ USBC USB client cable detection IRQ USIM USIM card detection IRQ MMC/SD card detection IRQ ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 65: Platform Interrupt Set/Clear Register (Intsetclr)

    PCMCIA socket 1 interrupt request (IRQ) S1_STSCHG PCMCIA socket 1 status changed S1_CD PCMCIA socket 1 card detection — — reserved S0_IRQ PCMCIA socket 0 IRQ S0_STSCHG PCMCIA socket 0 status changed ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 66 Memory Stick* detection PENIRQ ADI7873* touch-screen digitizer IRQ AC97 AC’97 CODEC IRQ ETHERNET Ethernet controller IRQ USBC USB client cable detection IRQ USIM USIM card detection IRQ MMC/SD card detection IRQ ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 67: Pcmcia Socket 0/1 Status/Control Registers (Pcmciax)

    VDD voltage sense signal / card status changed BVD1 Sx_nVS[2:1] VSS voltage sense signals Card detection signal: Sx_nCD 0 = Card is fully inserted. 1 = Card is not fully inserted or is not present. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 68: Fpga Revision Id (Revid)

    † † † † † † † † Reset Bits Name Access Description 15:0 REVID Revision ID of the FPGA (X.YZ) † Value determined by Revision of the FPGA Code resident. ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 69: Scratch Registers1/2/3 (Scratch1/2/3)

    Section 3.3.2 — LCD-Control Registers ® For complete details of these processor registers, see the corresponding chapter in the Intel PXA27x Processor Family Developer’s Manual. Note: In the following tables, ‘X’ means that a bit’s setting does not matter (“don’t care”) for basic kit system operation.
  • Page 70 PXA270 Processor Core Clock Configuration Register. See the Clocks and Power ® Manager chapter in the Intel PXA27x Processor Family Developer’s Manual.) ® • Use of fast-bus mode (see the Clocks and Power Manager chapter in the Intel PXA27x Processor Family Developer’s Manual) ® • Expansion-card presence (see Section 3.2.1.1) and memory-bus configuration (Intel...
  • Page 71: Sdram Configuration Register (Mdcnfg)

    31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 ® ® Stand-alone Intel PXA270 Processor and Intel PXA270 Processor with main board † XXX XXXX XXXX XXXX 100 0000 0000 1000 † 45° C TCR, all banks PASR ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 72: Sdram Memory Device Refresh Register (Mdrefr)

    “Flash Memory” on page 43. See also the kit parts lists. ® For more information on the APD function, see the MDREFR register description in the Memory Controller chapter of the Intel PXA27x Processor Family Developer’s Manual . 3. SDCLK1 = 65 MHz 4.
  • Page 73: Static Memory Control Register 0 (Msc0)

    NOTES: ® 1. These values are based upon the main board switch SW2 (SWAP_FLASH) being set to DOT (nCS0 = Intel PXA270 Processor flash). If SWAP_FLASH is set to NO-DOT (nCS0 = main board flash), then the upper and lower halves of this register must be swapped.
  • Page 74: Static Memory Control Register 1 (Msc1)

    Static Memory Control Register 1 (MSC1) ® Static chip select nCS2 is logically split across two devices: the SRAM on the Intel PXA270 Processor and the FPGA on the main board. The timing values shown in the following table are for the slowest device —...
  • Page 75: Synchronous Static Memory Configuration Register (Sxcnfg)

    000 0000 ® † These values are based upon the main board switch SW2 (SWAP_FLASH) being set to DOT (nCS0 = Intel PXA270 Processor flash). If SWAP_FLASH is set to NO-DOT (nCS0 = main board flash), then the values of these bits must be swapped.
  • Page 76: Lcd-Control Registers

    Custom clock configurations: — Clock sources — Run- and turbo-mode frequencies — Use of fast-bus mode ® For clock-configuration information, see the Clocks and Power Manager chapter in the Intel PXA27x Processor Family Developer’s Manual. • Presence of an alternate LCD 3.3.2.1...
  • Page 77: Lcd Controller Control Register 1 (Lccr1)

    LCCR4 Recommended Settings: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 Toshiba LTM04C380K VGA Toshiba LTM035A776C QVGA ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 78: Lcd Controller Control Register 5 (Lccr5)

    (USB client), card detection (PCMCIA, USIM), miscellaneous PCMCIA interrupts, and main board switch SW12. ® Note: Do not confuse the platform-level interrupts with the Intel PXA270 Processor interrupts, which ® are described in the Intel PXA27x Processor Family Developer’s Manual.
  • Page 79: Intel ® Pxa27X Processor Developer's Kit Interrupt Scheme A

    63). To enable the interrupt, set its bit. For more information about the peripherals and their interrupts, refer to the manufacturer’s data sheet. ® Figure 13. Intel PXA27x Processor Developer’s Kit Interrupt Scheme A regXXXSetClr Data(X) nWE_Rise nFpgaRst reglntSetClr(X) regXXXRiseDet...
  • Page 80: Intel ® Pxa27X Processor Developer's Kit Interrupt Scheme B

    ® Figure 14. Intel PXA27x Processor Developer’s Kit Interrupt Scheme B reglntSetClr(X) Data(X) nWE_Rise Other Interrupts nFpgaRst XXX_Int nGPIO[0] AnyClr A9905-01 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 81: General Purpose Input/Output (Gpio)

    PXA270 Processor GPIO pins, as shown in Table ® For instructions on programming the GPIO pins, refer to the GPIO chapter in the Intel PXA27x Processor Family Developer’s Manual. Note: In the table, the direction shown is relative to the processor.
  • Page 82 Baseband wait indicator for outbound link / PCMCIA PCMCIA_nPCE[1] nPREG / PCMCIA attribute space select / baseband inbound data bit BB_IB_DAT1 nPWAIT / PCMCIA interface wait / baseband inbound data bit BB_IB_DAT2 ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 83 LCD data line / PCMCIA PCMCIA_nPCE[2] USBHPWR0 / USB host over-current indicator / SSP2 Frame Sync SSPFRM2 USBHPEN0 USB host control for power ports URST / CIF_DD[4] USIM card reset / Camera Interface Data ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 84 UVS0 / CIF_DD[1] USIM voltage level control / Camera Interface Data U_EN / CIF_DD[3] USIM enable / Camera Interface Data U_DET / CIF_DD[2] USIM detect / Camera Interface Data C clock C data ® Intel PXA27x Processor Developer’s Kit - User’s Guide...
  • Page 85: Programming Flash Memory And Logic Devices

    Programming the CPLDs or the FPGA configuration EEPROM requires that the specific programming files be installed on the host computer. To obtain these files, contact the appropriate Intel field sales representative (see Intel’s web site at www.intel.com for a list of the representatives).
  • Page 86: Flash Memory

    After programming is complete, return the kit to normal operation by turning off kit power. 3.6.2 CPLD1 (Processor Card) ® CPLD1 contains the logic for controlling the Intel PXA270 Processor memory-bus transceivers, memory mapping, and JTAG chaining. Programming CPLD1 requires that the most recent version of the Xilinx programming file...
  • Page 87: Fpga Configuration Eeprom (Main Board)

    2. Turn off power to the kit. 3. Return SW2.1 and SW2.2 to the default ON position. ® Caution: Disconnect the JTAG cable from the Intel PXA270 Processor to avoid damage to the kit. 3.6.4 FPGA Configuration EEPROM (Main Board) U15 on the main board contains the configuration data for the field-programmable gate array (FPGA), which includes the platform registers and interrupts.
  • Page 88 1. Exit the XPLA programming software. 2. Turn off power to the kit. 3. Return SW2.1 and SW2.2 to its default ON position. ® Caution: Disconnect the JTAG cable from the Intel PXA270 Processor to avoid damage to the kit. ® Intel...

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