Contents
16-8
National Semiconductor Microwire* Frame Protocol (single transfers) .................................16-10
16-9
16-10
16-11
16-12
16-13
16-14
16-15
16-16
16-17
17-1
Example UART Data Frame....................................................................................................17-3
17-2
17-3
17-4
XMODE Example. ...................................................................................................................17-9
Tables
2-1CPU Core Fault Register Bit Definitions...............................................................................2-3
2-2
ID Bit Definitions ........................................................................................................................2-4
2-3
2-4
2-5
Processor Pin Types .................................................................................................................2-8
2-6
2-7
Pin Description Notes ..............................................................................................................2-17
2-8
3-1
3-2
3-3
3-4
3-5
3-6
3-7
PMCR Bit Definitions ...............................................................................................................3-23
3-8
PCFR Bit Definitions................................................................................................................3-24
3-9
PWER Bit Definitions...............................................................................................................3-25
3-10
PRER Bit Definitions................................................................................................................3-26
3-11
PFER Bit Definitions ................................................................................................................3-27
3-12
PEDR Bit Definitions................................................................................................................3-28
3-13
PSSR Bit Definitions................................................................................................................3-29
3-14
PSPR Bit Definitions................................................................................................................3-30
3-15
3-16
PGSR0 Bit Definitions .............................................................................................................3-32
3-17
PGSR1 Bit Definitions .............................................................................................................3-32
3-18
PGSR2 Bit Definitions .............................................................................................................3-33
3-19
RCSR Bit Definitions ...............................................................................................................3-34
3-20
CCCR Bit Definitions ...............................................................................................................3-35
3-21
CKEN Bit Definitions................................................................................................................3-36
3-22
OSCC Bit Definitions ...............................................................................................................3-38
3-23
3-24
CCLKCFG Bit Definitions ........................................................................................................3-39
3-25
PWRMODE Bit Definitions ......................................................................................................3-40
xvi
Intel® PXA255 Processor Developer's Manual