Stream Write; Stream Read - Intel PXA255 Developer's Manual

15.4.10

Stream Write

In a stream write command, the software must stop the clock and set the registers as described in
Section 15.4.4. These registers must be set before the clock is started:
•
Set MMC_NOB register to ffffh.
•
Set MMC_BLKLEN register to the number of bytes per block.
•
Update MMC_CMDAT register as:
— Write 0b01 to the MMC_CMDAT[RESPONSE_FORMAT].
— Set the MMC_CMDAT[DATA_EN] bit.
— Set the MMC_CMDAT[WRITE/READ] bit.
— Set the MMC_CMDAT[STREAM_BLOCK] bit.
— Clear the MMC_CMDAT[BUSY] bit.
— Clear the MMC_CMDAT[INIT] bit.
•
Turn the clock on.
After it turns the clock on, the software must perform these steps:
1. Wait for the response as described in
2. Write data to the MMC_TXFIFO FIFO and continue until all of the data is written to the FIFO.
Note: When data less than 32 bytes is written to the FIFO, the MMC_PRTBUF[BUF_PART_FULL] bit
must be set.
3. Set MMC_I_MASK to 0x77 and wait for MMC_I_REG[STOP_CMD] interrupt.
4. Set the command registers for a stop transaction command (CMD12).
5. Wait for a response to the stop transaction command as described in
6. Set MMC_I_MASK to 0x1e.
7. Wait for MMC_I_REG[DATA_TRAN_DONE] interrupt.
8. Set MMC_I_MASK to 0x1d.
9. Wait for MMC_I_REG[PRG_DONE] interrupt. This interrupt indicates that the card has
finished programming. Software may wait for MMC_I_REG[PRG_DONE] interrupt or start
another command sequence on a different card.
10. Read the MMC_STAT register to verify the status of the transaction (i.e. CRC error status).
To address a different card, the software must send a select command to that card by sending a
basic no data command and response transaction. To address the same card, the software must wait
for MMC_I_REG[PRG_DONE] interrupt. This ensures that the card is not in the busy state.
15.4.11

Stream Read

In a stream read command, the software must stop the clock and set the registers as described in
Section 15.4.4. These registers must be set before the clock is turned on:
•
Set MMC_NOB register to ffffh.
Intel® PXA255 Processor Developer's Manual
Section 15.4.4.
MultiMediaCard Controller
Section 15.4.4.
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