Table 3-9. 80960Sx and Kx Interrupt Switch Settings
Interrupt Source
Serial Port UART
PLX PCI 9060
Squall II Module
IRQ1
PLX PCI 9060
Serial Port UART
Parallel Port
Squall II Module
IRQ1
Parallel Port
NOTE:
* Bold indicates factory default position
3.7
CONSOLE SERIAL PORT
The Cyclone EP has a single console port with an RS-232 line interface. The port uses a phone plug
connector, and the board is supplied with a phone jack to DB25 cable.
The serial port is implemented with a 16C550 UART clocked with a 1.843 MHz clock. The device may
be programmed to use this clock with the internal baud rate counters. The serial port may be run at baud
rates between 1200 and 115200 baud. Refer to the 16C550 device data book for a detailed description of
the registers and device operation.
Address
B000 0000H
B000 0004H
B000 0008H
B000 000CH
B000 0010H
B000 0014H
B000 0018H
B000 001CH
Pos1
Pos2
ON*
OFF*
OFF
ON
ON*
OFF*
OFF
ON
Table 3-10. UART Register Addresses
Read Register
Receive Holding Register
Unused
Interrupt Status Register
Unused
Unused
Line Status Register
Modem Status Register
Scratchpad Register
HARDWARE REFERENCE
Pos3
Pos4
OFF*
ON*
OFF*
ON*
ON
OFF
ON
OFF
Write Register
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
Unused
Unused
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
Switch Diagram
1
2
3
4
O F F
3-9
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