Intel PXA255 Developer's Manual page 180

Intel computer hardware user manual

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DMA Controller

Table 5-13. DMA Controller Register Summary (Sheet 3 of 5)

Request to Channel Map Register for USB endpoint 6

Request to Channel Map Register for USB endpoint 7

Request to Channel Map Register for USB endpoint 8

Request to Channel Map Register for USB endpoint 9

Request to Channel Map Register for USB endpoint 11

Request to Channel Map Register for USB endpoint 12

Request to Channel Map Register for USB endpoint 13

Request to Channel Map Register for USB endpoint 14

DMA Descriptor Address Register channel 0

DMA Source Address Register channel 0

DMA Target Address Register channel 0

DMA Command Address Register channel 0

DMA Descriptor Address Register channel 1

DMA Source Address Register channel 1

DMA Target Address Register channel 1

DMA Command Address Register channel 1

DMA Descriptor Address Register channel 2

DMA Source Address Register channel 2

DMA Target Address Register channel 2

DMA Command Address Register channel 2

DMA Descriptor Address Register channel 3

DMA Source Address Register channel 3

DMA Target Address Register channel 3

DMA Command Address Register channel 3

DMA Descriptor Address Register channel 4

DMA Source Address Register channel 4

DMA Target Address Register channel 4

DMA Command Address Register channel 4

DMA Descriptor Address Register channel 5

DMA Source Address Register channel 5

Intel® PXA255 Processor Developer's Manual

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