Auto-Baud Control Register (Abr); Auto-Baud Count Register (Acr); Abr Bit Definitions - Intel PXA255 Developer's Manual

17.5.8

Auto-Baud Control Register (ABR)

The ABR, shown in
detection within the UART. Through this register, users can enable or disable the auto-baud lock
interrupt, direct either the processor or UART to program the final baud rate in the Divisor Latch
registers, and choose between the two methods used to calculate the final baud rate.
The auto-baud circuitry counts the number of clocks in the start bit and writes this count into the
Auto-Baud Count register (ACR – refer to
ABR[ABLIE] is set. It also automatically programs the Divisor Latch registers (DLL and DLH –
refer to Section
See Section 17.4.4
Note: Auto-baud rate detection is not supported with slow infrared Mode.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.
Table 17-12. ABR Bit Definitions
Physical Address
0x4160_0028
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Reset ? ? ? ? ? ?
Bits Name
31:4
3
2 ABUP
1 ABLIE
0
17.5.9

Auto-Baud Count Register (ACR)

The ACR, shown in
pulse. This value is then used by the processor or the UART to calculate the baud rate. If auto-baud
mode (ABR[ABE] –
UART interrupts the processor with the auto-baud lock interrupt (IIR[ABL] –
it has written the count value into the ACR. The value is written regardless of the state of the auto-
baud UART program bit (ABR[ABUP]).
Intel® PXA255 Processor Developer's Manual
Table 17-12, controls the functionality and options for auto-baud-rate
17.5.3) if ABR[ABUP] bit is set.
for more information on auto-baud rate.
Autobaud Control Register (ABR)
reserved
? ? ? ? ? ? ?
— reserved
AutoBaud Table. Uses a table to select low-speed baud rates instead of a formula. Only
valid if ABR[ABUP] is set.
0 = Table used to calculate baud rates which limits UART to choosing common baud rates
ABT
as shown in Section 17.4.4, "Auto-Baud-Rate Detection" on page 17-7
1 = Formula used to calculate baud rates allowing all possible baud rates to be chosen by
UART.
AutoBaud UART Program. Controls if the UART automatically programs DLL and DLH or if
the processor must program DLL and DLH based on the results in the ACR.
0 = Processor Programs Divisor Latch registers
1 = UART Programs Divisor Latch registers
Autobaud Lock Interrupt Enable.
0 = Autobaud Lock Interrupt disabled (Source IIR[ABL])
1 = Autobaud Lock Interrupt enabled (Source IIR[ABL])
Autobaud Enable.
ABE
0 = Autobaud Disabled
1 = Autobaud Enabled
Table 17-13, stores the number of 14.7456 MHz clock cycles within a start bit
Section 17.5.8) and auto-baud interrupts (ABR[ABLIE]) are enabled, the
Section 17.5.9). It then interrupts the processor if
? ? ? ? ? ? ? ?
Description
Hardware UART
PXA255 Processor Hardware UART
8 7 6 5 4 3
? ? ? ? ? ? ? 0
Section 17.5.5) after
2 1 0
0 0 0
17-17