Advanced-Control Timer (Adtm) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
Chapter 10 Advanced-control Timer (ADTM)
The Advanced-control timer Module contains a powerful 16-bit auto-reload timer, TIM1, which can be used
to measure pulse width or generate pulses, PWM waves, etc. It is used in motor control, power supply, etc.
10.1 Main features
The main features of the advanced-control timer TIM1 include.
l 16-bit auto-reload counter supporting incremental counting mode, decremental counting mode and
incremental and decremental counting mode.
l 16-bit prescaler with dynamically adjustable crossover coefficients from 1 to 65536.
l Support for four independent comparison capture channels.
l Each comparison capture channel supports multiple operating modes, such as: input capture, output
comparison, PWM generation and single pulse output.
l Complementary outputs supporting programmable dead time.
l Support for external signals to control the timer.
l
Support for updating the timer after a defined period using a repeat counter.
l Support for resetting the timer or placing it in the OK state using the brake signal.
l Support for the use of DMA in multiple modes.
l
Support for incremental encoders.
l Support cascading and synchronization between timers.
10.2 Principle and structure
This section deals with the internal construction of advanced-control timers.
10.2.1 Overview
As shown in Figure 10-1, the structure of the advanced-control timer can be roughly divided into three parts,
namely the input clock part, the core counter part and the compare capture channel part.
The advanced-control timer can be clocked from the APB bus clock (CK_INT), from an external clock input
pin (TIMx_ETR), from other timers with clock output (ITRx), or from the input of the compare capture channel
(TIMx_CHx). These input clock signals become the CK_PSC clock after various set filtering and dividing
operations and are output to the core counter section. In addition, these complex clock sources can also be
output as TRGO to other peripherals such as timers and ADCs.
The core of the advanced-control timer is a 16-bit counter (CNT), and the CK_PSC is divided by a prescaler
(PSC) to become the CK_CNT and output to the CNT. An auxiliary counter counts the number of times the
ATRLR reloads the initial value for the CNT and generates a specific event when the count reaches the number
set in the Repeat Count Register (RPTCR).
The advanced-control timer has four sets of compare capture channels, each of which can input pulses from
exclusive pins or output waveforms to the pins, i.e., the compare capture channels support both input and
output modes. The input of each channel of the compare capture register supports filtering, dividing and edge
detection operations, and supports mutual triggering between channels, as well as providing a clock for the
core counter
CNT. Each compare capture channel has a set of compare capture registers (CHxCVR) that support
comparison with the main counter (CNT) to output pulses.
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