Flash Memory And User Option Bytes; Flash Memory Organization; Flash Memory Programming And Security; Security - Prevent Illegal Access (Read, Write, Erase) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
Chapter 16 Flash Memory and User Option Bytes

16.1 Flash memory organization

The internal flash memory of the chip is organized as follows.
Block
Main
memory
Information
block
User option bytes
Notes: The above main memory area is used for user's application storage and is write-protected in 1K byte
(16 pages) units; except for the "vendor configuration word" area which is factory locked and inaccessible to
the user, the other areas are user-operable under certain conditions.

16.2 Flash memory programming and security

16.2.1 Two programming/erasing methods
l
Standard programming: This mode is the default programming mode (compatible mode). In this mode,
the CPU performs programming in single 2-byte mode and performs erase and whole erase operation in
single 1K byte.
l
Fast programming: This method uses the page operation method (recommended). After a specific
sequence of unlocking, a single 64-byte programming and 64-byte erasure, 1Kbyte erasure and whole-
piece erasure are performed.

16.2.2 Security - prevent illegal access (read, write, erase)

l Page write protection
l Read protection
When the chip is in the read-protected state.
1) Main memory pages 0-32 (2K bytes) are automatically write-protected state, not controlled by
FLASH_WPR register; unread-protected state, all main memory pages are controlled by FLASH_WPR
register.
2) The system boot code area, SDI mode, and RAM area are not erasable or programmable for main memory,
except for whole chip erasure. User-selected word areas can be erased or programmed. If an attempt is
made to unprotect the read (program the user word), the chip will automatically erase the entire user area.
Note: The internal RC oscillator (HSI) must be turned on when performing a program/erase operation of the
flash memory.
16.3 Register description
Name
R32_FLASH_ACTLR
V1.3
Table 16-1 Flash Memory Organization
Name
Page 0 0x0800 0000 – 0x0800 003F
Page 1 0x0800 0040 – 0x0800 007F
Page 2 0x0800 0080 – 0x0800 00BF
Page 3 0x0800 00C0 – 0x0800 00FF
...
Page 256 0x0800 3FC0 – 0x0800 3FFF
Launcher code 0x1FFF F000 – 0x1FFF F77F
0x1FFF F800 – 0x1FFF F83F
Table 16-2 FLASH-related registers list
Access
address
0x40022000
Address Range
...
Description
Control register
167
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Size(byte)
64
64
64
64
...
64
2K-128
64
Reset value
0x00000000