Counter For Advanced-Control Timer (Tim1_Cnt); Counting Clock Prescaler (Tim1_Psc); Auto-Reload Value Register (Tim1_Atrlr); Repeat Count Value Register (Tim1_Rptcr) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
4 CC2E
3 CC1NP
2 CC1NE
1 CC1P
0 CC1E

10.4.10 Counter for advanced-control timer (TIM1_CNT)

Offset address: 0x24
15 14 13 12
Bit Name
[15:0] CNT

10.4.11 Counting clock prescaler (TIM1_PSC)

Offset address: 0x28
15 14 13 12
Bit Name
[15:0] PSC

10.4.12 Auto-reload value register (TIM1_ATRLR)

Offset address: 0x2C
15 14 13 12
Bit Name
[15:0] ATRLR

10.4.13 Repeat count value register (TIM1_RPTCR)

Offset address: 0x30
15 14 13 12
Reserved
Bit Name
[15:8] Reserved
[7:0] RPTCR
V1.3
RW Compare the capture channel 2 output enable bit.
Compare capture channel 1 complementary output
RW
polarity setting bit.
Compare capture channel 1 complementary output
RW
enable bit.
RW Compare capture channel 1 output polarity setting bit.
RW Compare capture channel 1 output enable bit.
11 10 9 8
CNT[15:0]
Access
RW The real-time value of the timer's counter.
11 10 9 8
PSC[15:0]
Access
The dividing factor of the prescaler of the timer; the
RW clock frequency of the counter is equal to the input
frequency of the divider/(PSC+1).
11 10 9 8
ATRLR[15:0]
Access
The value of this field will be loaded into the counter,
RW see section 10.2.3 for when the ATRLR acts and
updates; the counter stops when the ATRLR is empty.
11 10 9 8
Access
RO Reserved
RW The value of the repeat counter.
108
7 6 5 4
Description
7 6 5 4
Description
7 6 5 4
Description
7 6 5 4
RPTCR[7:0]
Description
http://wch.cn
0
0
0
0
0
3 2 1 0
Reset
value
0
3 2 1 0
Reset
value
0
3 2 1 0
Reset
value
0
3 2 1 0
Reset
value
0
0