Low-Power Configuration Options; Sleep Mode; Standby Mode; Auto-Wakeup (Awu) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual

2.3.1 Low-power configuration options

l WFI and WFE
WFI: The microcontroller is woken up by an interrupt source with interrupt controller response, and the
interrupt service function will be executed first after the system wakes up (except for microcontroller reset).
WFE: The wakeup event triggers the microcontroller to exit low-power mode. Wake-up events include.
1) Configure an external or internal EXTI line to event mode, when no interrupt controller needs to be
configured.
2) Or configure an interrupt source, equivalent to a WFI wakeup, where the system prioritizes the execution
of the interrupt service function.
3) Or configure the SLEEPONPEN bit to turn on peripheral interrupt enable, but not interrupt enable in the
interrupt controller, and the interrupt pending bit needs to be cleared after the system wakes up.
l SLEEPONEXIT
Enable: After executing the WFI or WFE instruction, the microcontroller ensures that all pending
interrupt services are exited and then enters low-power mode.
Not enabled: The microcontroller enters low-power mode immediately after executing the WFI or WFE
command.
l SEVONPEND
Enable: All interrupts or wake-up events can wake up the low-power consumption entered by executing
WFE.
Not enabled: Only interrupts or wake-up events enabled in the interrupt controller can wake up the low-
power consumption entered by executing WFE.

2.3.2 Sleep mode

In this mode, all I/O pins keep their state in Run mode and all peripheral clocks are normal, so try to turn off
useless peripheral clocks before entering Sleep mode to reduce low-power consumption. This mode takes the
shortest time to wake up.
Enter: Configure core register control bit SLEEPDEEP=0, power control register PDDS=0, execute WFI or
WFE, optionally SEVONPEND and SLEEPONEXIT.
Exit: Arbitrary interrupt or wakeup event.

2.3.3 Standby mode

Standby mode is a combination of peripheral clock control mechanisms based on the core's deep Sleep mode
(SLEEPDEEP) and allows the voltage regulator to operate at a much lower-power consumption. This mode
has the high frequency clock (HSE/HSI/PLL) domain turned off, the SRAM and register contents held, and
the I/O pin state held. The system can continue to run after this mode wakes up, and the HSI is called the
default system clock.
If flash programming is in progress, the system does not enter Stop mode until access to memory is complete;
if access to the APB is in progress, the system does not enter Stop mode until access to the APB is complete.
Standby mode can work modules: Independent Watchdog (IWDG), Low Frequency Clock (LSI).
Enter: Configure the core register control bit SLEEPDEEP=1, PDDS=1 in the power control register, and
execute WFI or WFE, optionally SEVONPEND and SLEEPONEXIT.
Exit:
1) Any interrupt/event (set in the external interrupt register).
2) AWU event, external reset on NRST pin, IWDG reset, clock switches to HSI after this wakeup, system
does not reset.

2.3.4 Auto-wakeup (AWU)

Auto-wakeup without external interrupts can be implemented. The time base can be programmed to wake up
periodically from Standby mode.
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