Auto-Wakeup Control/Status Register (Pwr_Awucsr); Auto-Wakeup Window Comparison Value Register (Pwr_ Awuwr) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
Bit Name
[31:3] Reserved
2 PVD0
[1:0] Reserved
Note: This register remains unchanged after waking up from Standby mode.

2.4.3 Auto-wakeup control/status register (PWR_AWUCSR)

Offset address: 0x08
31 30 29 28
15 14 13 12
Bit Name
[31:2] Reserved
1 AWUEN
0 Reserved

2.4.4 Auto-wakeup window comparison value register (PWR_ AWUWR)

Offset address: 0x0C
31 30 29 28
15 14 13 12
Bit Name
[31:6] Reserved
[5:0] AWUWR
2.4.5 Auto-wakeup window comparison value register (PWR_ AWUWR)
Offset address: 0x10
31 30 29 28
15 14 13 12
V1.3
Access
RO Reserved
PVD output status flag bit. This bit is valid when PVDE=1
of PWR_CTLR register.
1: VDD and VDDA are below the PVD threshold set by
RO
PLS[2:0].
0: VDD and VDDA are above the PVD threshold set by
PLS[2:0].
RO Reserved
27 26 25 24
Reserved
11 10 9 8
Reserved
Access
RO Reserved
Enable Automatic wake-up
RW 1: Turn on auto-wakeup;
0: Invalid.
RO Reserved
27 26 25 24
Reserved
11 10 9 8
Reserved
Access
RO Reserved
AWU window value, which is used to compare with the
RW recursive counter value and generate a wake-up signal
when the counter value is equal to the window value.
27 26 25 24
Reserved
11 10 9 8
Description
23 22 21 20
7 6 5
Description
23 22 21 20
7 6 5
Description
23 22 21 20
7 6 5
9
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Reset
value
19 18 17
4 3 2 1
AWU
EN
Reset
value
19 18 17
4 3 2 1
AWUUWR
Reset
value
0x3f
19 18 17
4 3 2 1
0
0
0
16
0
Reser
ved
0
0
0
16
0
0
16
0