Pfic Interrupt Enable Status Register 1 - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
R32_PFIC_GISR
R32_PFIC_VTFIDR
R32_PFIC_VTFADDRR0
R32_PFIC_VTFADDRR1
R32_PFIC_IENR1
R32_PFIC_IENR2
R32_PFIC_IRER1
R32_PFIC_IRER2
R32_PFIC_IPSR1
R32_PFIC_IPSR2
R32_PFIC_IPRR1
R32_PFIC_IPRR2
R32_PFIC_IACTR1
R32_PFIC_IACTR2
R32_PFIC_IPRIORx
R32_PFIC_SCTLR
Note:
1. The default value of PFIC_ISR0 register is 0xC, that is, NMI and exception are always enabled by default.
2. NMI and EXC support interrupt pending clear and setting operation, but not interrupt enable clear and
setting operation.
6.5.2.1 PFIC interrupt enable status register 1 (PFIC_ISR1)
Offset address: 0x00
31 30 29 28
15 14 13 12
INTE INTE
Reser Reser
NST NST
ved ved
A14 A12
Bit Name
[31:16] INTENSTA16_31
15 Reserved
14 INTENSTA14
13 Reserved
12 INTENSTA12
[11:4] Reserved
V1.3
0xE000E04C PFIC interrupt global status register
PFIC VTF interrupt ID configuration
0xE000E050
register
PFIC VTF interrupt 0 offset address
0xE000E060
register
PFIC VTF interrupt 1 offset address
0xE000E064
register
0xE000E100 PFIC interrupt enable setting register 1
0xE000E104 PFIC interrupt enable setting register 2
0xE000E180 PFIC interrupt enable clear register 1
0xE000E184 PFIC interrupt enable clear register 2
0xE000E200 PFIC interrupt pending setting register 1 0x00000000
0xE000E204 PFIC interrupt pending setting register 2 0x00000000
0xE000E280 PFIC interrupt hang clear register 1
0xE000E284 PFIC interrupt hang clear register 2
PFIC interrupt activation status register
0xE000E300
1
PFIC interrupt activation status register
0xE000E304
2
PFIC interrupt priority configuration
0xE000E400
register
0xE000ED10 PFIC system control register
27 26 25 24
INTENSTA[31:16]
11 10 9 8
Reserved
Access
16#-31# Interrupt current enable state.
1: The current numbered interrupt is
RO enabled.
0: The current numbered interrupt is not
enabled.
RO Reserved
14# Interrupt current enable status.
1: The current numbered interrupt is
RO enabled.
0: The current numbered interrupt is not
enabled.
RO Reserved
12# Interrupt current enable status.
1: The current numbered interrupt is
RO enabled.
0: The current numbered interrupt is not
enabled.
RO Reserved
23 22 21
7 6 5
Description
37
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0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
20 19 18 17
4 3 2 1
INTE INTE
NST NST Reserved
A3 A2
Reset value
0
0
0
0
0
0
16
0