Interrupt Status Register (Tim1_Intfr) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
10 CC2DE
9 CC1DE
8 UDE
7 BIE
6 TIE
5 COMIE
4 CC4IE
3 CC3IE
2 CC2IE
1 CC1IE
0 UIE

10.4.5 Interrupt Status Register (TIM1_INTFR)

Offset address: 0x10
15 14 13 12 11
Reserved CC4OF CC3OF CC2OF CC1OF Reserved BIF TIF COMIF CC4IF CC3IF CC2IF CC1IF UIF
Bit Name
[15:13] Reserved
12 CC4OF
11 CC3OF
10 CC2OF
9 CC1OF
V1.3
channel 3.
Compare the DMA request enable bit of capture
channel 2.
1: allows comparison of DMA requests for capture
RW
channel 2.
0: Disable comparison of DMA requests for capture
channel 2.
Compare the DMA request enable bit of capture
channel 1.
1: allows comparison of DMA requests for capture
RW
channel 1.
0: Disable comparison of DMA requests for capture
channel 1.
Updated DMA request enable bit.
RW 1: DMA requests that allow updates.
0: DMA requests for updates are disabled.
Brake interrupt enable bit.
RW 1: Allowing brakes to be interrupted.
0: Brake interruption is prohibited.
Trigger the interrupt enable bit.
RW 1: Enables triggering of interrupts.
0: Trigger interrupt is disabled.
COM interrupt allow bit.
RW 1: Allow COM interrupts.
0: COM interrupt is disabled.
Compare capture channel 4 interrupt enable bit.
RW 1: Allows comparison of capture channel 4 interrupts.
0: Disable compare capture channel 4 interrupt.
Compare capture channel 3 interrupt enable bit.
RW 1: Allows comparison of capture channel 3 interrupts.
0: Disable compare capture channel 3 interrupt.
Compare capture channel 2 interrupt enable bit.
RW 1: allows comparison of capture channel 2 interrupts.
0: Disable compare capture channel 2 interrupt.
Compare capture channel 1 interrupt enable bit.
RW 1: allows comparison of capture channel 1 interrupts.
0: Disable compare capture channel 1 interrupt.
Update the interrupt enable bit.
RW 1: Allowing updates to be interrupted.
0: Disable update interruption.
10 9 8
Access
RO Reserved
RW0 Compare capture channel 4 to repeat capture flag bits.
RW0 Compare capture channel 3 to repeat capture flag bits.
RW0 Compare capture channel 2 to repeat capture flag bits.
The compare capture channel 1 repeat capture flag bit
is used only when the compare capture channel is
RW0 configured for input capture mode.
This flag is set by hardware and a software write of 0
clears this bit.
101
7 6 5 4
Description
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0
0
0b
0
0
0
0
0
0
0
0
3 2 1 0
Reset
value
0
0
0
0
0b