Main Memory Standard Programming; Main Memory Standard Erase - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual

16.4.3 Main memory standard programming

Standard programming can be written 2 bytes at a time. When the PG bit of FLASH_CTLR register is '1', each
half-word (2 bytes) written to the flash address will initiate programming once, and writing any non-half-word
data will cause the FPEC to generate a bus error. During programming, the BSY bit is '1', and at the end of
programming, the BSY bit is '0' and the EOP bit is '1'.
Note: When the BSY bit is '1', it will prohibit to perform write operation to any register.
1) Check the FLASH_CTLR register LOCK, if it is 1, you need to execute the "Unlock Flash" operation.
2) Set the PG bit of FLASH_CTLR register to '1' to enable the standard programming mode.
3) Write the half word to be programmed to the specified flash address (even address).
4) Wait for the BSY bit to become '0' or the EOP bit of FLASH_STATR register to be '1' to indicate the end
of programming, and clear the EOP bit to 0.
5) Query the FLASH_STATR register to see if there is an error or read the programmed address data
checksum.
6) Continue programming you can repeat steps 3-5 and end programming to clear the PG bit to 0.

16.4.4 Main memory standard erase

Flash memory can be erased by standard page (1K bytes) or by whole chip.
V1.3
Figure 16-1 FLASH Programming
Read the LOCK bit of
FLASH_CTRL
LOCK bit=1?
NO
Set FLASH_CTLR PG bit=1
Specified address write half
word (2 bytes)
BSY bit=1？
NO
Read EOP/WRPRTERR to judge the
programming result Read the programmed
address to check the written data
Continue
programming?
NO
Over，PG bit=0
Perform "Unlock Flash
YES
Memory" operation
YES
YES
173
http://wch.cn