Compare/Capture Enable Register 2 (Tim1_Ccer) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
15 14 13 12
OC4CE OC4M[2:0]
IC4F[3:0]
Comparison mode (pin direction is output).
Bit Name
15 OC4CE
[14:12] OC4M
11 OC4PE
10 OC4FE
[9:8] CC4S
7 OC3CE
[6:4] OC3M
3 OC3PE
2 OC3FE
[1:0] CC3S
Capture mode (pin direction is input).
Bit Name
[15:12] IC4F
[11:10] IC4PSC
[9:8] CC4S
[7:4] IC3F
[3:2] IC3PSC
[1:0] CC3S

10.4.9 Compare/Capture enable register 2 (TIM1_CCER)

Offset address: 0x20
15 14 13 12
Reserve CC4 CC4 CC3N
d P E
Bit Name
[15:14] Reserved
13 CC4P
12 CC4E
11 CC3NP
10 CC3NE
9 CC3P
8 CC3E
7 CC2NP
6 CC2NE
5 CC2P
V1.3
11 10 9
OC4PE OC4FE
CC4S[1:0]
IC4PSC[1:0]
Access
RW Compare capture channel 4 clear enable bit.
RW Compare the Capture Channel 4 mode setting field.
RW Compare Capture Register 4 preload enable bit.
RW Compare capture channel 4 fast enable bit.
RW Compare capture channel 4 input selection fields.
RW Compare capture channel 3 clear enable bit.
RW Compare capture channel 3 mode setting field.
RW Compare Capture Register 3 preload enable bit.
RW Compare capture channel 3 fast enable bit.
RW Compare capture channel 3 input selection fields.
Access
RW Input capture filter 4 configuration field.
Compare the capture channel 4 prescaler configuration
RW
field.
RW Compare capture channel 4 input selection fields.
RW Input capture filter 3 configuration field.
Compare capture channel 3 prescaler configuration
RW
fields.
RW Compare capture channel 3 input selection fields.
11 10 9 8
CC3N CC3 CC3
P E P E
Access
RO Reserved
Compare the capture channel 4 output polarity setting
RW
bit.
RW Compare capture channel 4 output enable bit.
Compare capture channel 3 complementary output
RW
polarity setting bit.
Compare capture channel 3 complementary output
RW
enable bits.
Compare the capture channel 3 output polarity setting
RW
bit.
RW Compare the capture channel 3 output enable bit.
Compare capture channel 2 complementary output
RW
polarity setting bit.
Compare capture channel 2 complementary output
RW
enable bits.
Compare the capture channel 2 output polarity setting
RW
bit.
8 7 6 5
OC3CE OC3M[2:0]
IC3F[3:0]
Description
Description
7 6 5
CC2N CC2N CC2 CC2
P E P
Description
107
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4 3 2 1
OC3PE OC3FE
CC3S[1:0]
IC3PSC[1:0]
4 3 2 1
CC1N CC1N CC1
E P E P
0
Reset
value
0
0
0
0
0
0
0
0
0
0
Reset
value
0
0
0
0
0
0
0
CC1
E
Reset
value
0
0
0
0
0
0
0
0
0
0