Extended Configuration; Configuring The Extended Control Register (Extend_Ctr) - WCH CH32V003 Series Reference Manual

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CH32V003 Reference Manual

17.1 Extended configuration

The system provides the EXTEND extended configuration unit (EXTEND_CTR register). This unit uses the
AHB clock and performs a reset action only at system reset. It mainly includes the following extended control
bit functions.
1)
Adjusting the built-in voltage: The LDOTRIM field selects the default value, which can be modified
when adjusting performance and power consumption.
2)
Lock-up function monitoring: The LKUPEN field is enabled, which will open the Lock-up situation
monitoring of the system. Once the Lock-up situation occurs, the system will perform a software reset
and set the LKUPRESET field to 1. After reading, you can write 1 to clear this flag.
3)
Configure the op-amp: set OPA_EN to enable the OPA, configure OPA_PSEL to select the positive input
pin of the OPA, and configure OPA_NSEL to select the negative input pin of the OPA.
17.2 Register description
Name
R32_EXTEN_CTR

17.2.1 Configuring the extended control register (EXTEND_CTR)

Offset address: 0x00
31
30
29
28
15
14
13
12
Reserved
Bit
Name
[31:19]
Reserved
18
OPA_PSEL
17
OPA_NSEL
16
OPA_EN
[15:11]
Reserved
10
LDOTRIM
[9:8]
Reserved
7
LKUPRST
V1.3
Chapter 17 Extended configuration
Table 17-1 EXTEND-related registers list
Access address
0x40023800
Configure extended control registers
27
26
25
Reserved
11
10
9
LDO
_TRI
Reserved
M
Access
RO
Reserved
OPA positive end channel selection
RW
0: Positive end channel 0
1: Positive end channel 1
OPA negative end channel selection
RW
0: Negative end channel 0
1: Negative end channel 1
OPA Enable
RW
1: Turn on enable
0: Turn off OPA
RO
Reserved
Core voltage modes.
RW
0: Normal voltage mode
1: Boost voltage mode
RO
Reserved
LOCKUP reset flag.
RW1
1: occurrence of LOCKUP resulting in system
reset, write 1 cleared.0: Normal.
Description
24
23
22
21
8
7
6
5
LKU
LKU
PRST
PEN
Description
179
http://wch.cn
Reset value
0x00000A00
20
19
18
17
OP
OP
A_
A_
PSE
NS
L
EL
4
3
2
1
Reserved
Reset value
0
0
0
0
0
0
0
0
16
OP
A_
EN
0

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