Configuration Register (Flash_ Ctlr) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
Bit Name
[31:0] OBKEYR
16.3.4 OBKEY register (FLASH_OBTKEYR)
Offset address: 0x08
31 30 29 28
15 14 13 12
LOCK MODE
Bit Name
[31:16] Reserved
15 LOCK
14 MODE
[13:6] Reserved
5 EOP
4 WRPRTERR
[3:1] Reserved
0 BUSY
Note: When performing the programming operation, you need to make sure the STRT bit of FLASH_CTLR
register is 0.

16.3.5 Configuration register (FLASH_ CTLR)

Offset address: 0x10
31 30 29 28
15 14 13 12
FLO EOPI
Reserved
CK E
V1.3
Access
Select word key for entering the select word key
WO
to release OPTWRE.
27 26 25 24 23
Reserved
11 10 9 8
Reserved
Access
RO Reserved
BOOT zone lockout
RW 1: Locked
0: Unlocked.
Combined with BOOT_AVA, you can control
the switch between user area and BOOT area
1：After software reset, you can switch to the
RW
BOOT area.
0: After software reset, you can switch to the
user area.
RO Reserved
Indicates the end of the operation, and write 1
clears 0.
RW1
The hardware is set each time it is successfully
erased or programmed.
Indicates a write protection error, write 1 clear.
RW1 The hardware will set the address if it is
programmed for write protection.
RO Reserved
Indicates busy status.
RO 1: Indicates that a flash operation is in progress.
0: End of operation.
27 26 25 24
Reserved
11 10 9 8
Reser ERRI OBW Reser
ved E RE ved
Description
22 21 20
7 6 5
WRPRT
EOP
ERR
Description
23 22 21
7 6 5
LOC STR OBP
OBER
K T
169
http://wch.cn
Reset
value
X
19 18 17
4 3 2 1
Reserved
Reset
value
20 19 18 17
BUF
BUF
LOA FTER FTPG
RST
D
4 3 2 1
Reser
MER SER
G ved
16
0
BSY
0
1
0
0
0
0
0
0
16
0
PG