Status Register (Wwdg_Statr) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual

5.3.3 Status register (WWDG_STATR)

Offset address: 0x08
15 14 13 12
Bit Name
[15:1] Reserved
0 EWIF
V1.3
operation can only be performed when the counter
value is less than the window value and greater
than 0x3F.
11 10 9 8
Reserved
Access
WO Reserved
Wake up the interrupt flag bit early.
When the counter reaches 0x40, this bit is set in
hardware and must be cleared to 0 by software; the
RW0
user setting is invalid. Even if the EWI is not set,
this bit will still be set as usual when the event
occurs.
7 6 5
Description
31
http://wch.cn
4 3 2 1
Reset value
0
0
0
EWIF