Apb2 Peripheral Clock Enable Register - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
Bit Name
[31:3] Reserved
2 SRAMEN
1 Reserved
0 DMA1EN
Note: When the peripheral clock is not enabled, the software cannot read out the peripheral register value and
the returned value is always 0.
3.4.7 APB2 Peripheral clock enable register (RCC_APB2PCENR)
Offset address: 0x18
31 30 29 28
15 14 13 12
USAR
Reser Reser SPI1
T1
ved ved EN
EN
Bit Name
[31:15] Reserved
14 USART1EN
13 Reserved
12 SPI1EN
11 TIM1EN
10 Reserved
9 ADC1EN
[8:6] Reserved
5 IOPDEN
4 IOPCEN
3 Reserved
2 IOPAEN
1 Reserved
0 AFIOEN
Note: When the peripheral clock is not enabled, the software cannot read out the peripheral register value and
the value returned is always 0.
V1.3
Access
RO Reserved
SRAM interface module clock enable bit.
1: SRAM interface module clock on during Sleep mode.
RW
0: The SRAM interface module clock is turned off in Sleep
mode.
RO Reserved
DMA1 module clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
27 26 25 24
Reserved
11 10 9 8
ADC
TIM1 Reser
1
EN ved
EN
Access
RO Reserved
USART1 interface clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
RO Reserved
SPI1 interface clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
TIM1 module clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
RO Reserved
ADC1 module clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
RO Reserved
PD port module clock enable bit for I/O.
RW
1: Module clock is on; 0: Module clock is off.
PC port module clock enable bit for I/O.
RW
1: Module clock is on; 0: Module clock is off.
RO Reserved
PA port module clock enable bit for I/O.
RW
1: Module clock is on; 0: Module clock is off.
RO Reserved
I/O auxiliary function module clock enable bit.
RW
1: Module clock is on; 0: Module clock is off.
Description
23 22 21
7 6 5
IOPD IOPC
Reserved
EN EN
Description
22
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Reset
value
20 19 18 17
4 3 2 1
Reser IOPA Reser
ved EN ved
Reset
value
0
1
0
0
16
0
AFIO
EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0