Tim2-Related Registers List; Control Register 1 (Tim2_Ctlr1) - WCH CH32V003 Series Reference Manual

CH32V003 Reference Manual
11.3.8 Timer synchronization mode
Timers are capable of outputting clock pulses (TRGO) and also receiving inputs from other timers (ITRx). The
source of ITRx (TRGO from other timers) is different for different timers. The timer internal trigger
connections are shown in Table 11-2.
From timer
TIM2
TIM1
11.3.9 Debug mode
When the system enters the debug mode, the timer can be controlled to continue running or stop according to
the setting of DBG module.
11.4 Register Description
Name
R16_TIM2_CTLR1
R16_TIM2_CTLR2
R16_TIM2_SMCFGR
R16_TIM2_DMAINTENR
R16_TIM2_INTFR
R16_TIM2_SWEVGR
R16_TIM2_CHCTLR1
R16_TIM2_CHCTLR2
R16_TIM2_CCER
R16_TIM2_CNT
R16_TIM2_PSC
R16_TIM2_ATRLR
R16_TIM2_CH1CVR
R16_TIM2_CH2CVR
R16_TIM2_CH3CVR
R16_TIM2_CH4CVR
R16_TIM2_DMACFGR
R16_TIM2_DMAADR

11.4.1 Control Register 1 (TIM2_CTLR1)

Offset address: 0x00
15 14 13 12
CAPL CAP
Reserved
VL OV
Bit Name
15 CAPLVL
V1.3
Table 11-2 GTPM internal trigger connection
ITR0(TS=000) ITR1(TS=001)
TIM1
Table 11-3 TIM2-related registers list
Offset address
0x40000000 TIM2 control register1
0x40000004 TIM2 control register2
0x40000008 TIM2 Slave mode control register
TIM2
0x4000000C
register
0x40000010 TIM2 interrupt status register
0x40000014 TIM2 event generation register
TIM2
0x40000018
register1
TIM2
0x4000001C
register2
0x40000020 TIM2 compare/capture enable register
0x40000024 TIM2 counter
0x40000028 TIM2 count clock prescaler
0x4000002C TIM2 auto-reload register
0x40000034 TIM2 compare/capture register1
0x40000038 TIM2 compare/capture register2
0x4000003C TIM2 compare/capture register3
0x40000040 TIM2 compare/capture register4
0x40000048 TIM2 DMA control register
TIM2 DMA address register in
0x4000004C
continuous mode
11 10 9 8
CKD[1:0]
Access
In double-edge capture mode, the capture level
RW
indication is enabled.
119
ITR2(TS=010)
TIM2
Description
DMA/interrupt
compare/capture
compare/capture
7 6 5
ARP
CMS[1:0] DIR OPM URS UDIS CEN
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Description
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ITR3(TS=011)
Reset value
0x0000
0x0000
0x0000
enable
0x0000
0x0000
0x0000
control
0x0000
control
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
4 3 2 1
Reset
value
0
0