Oscillation Stabilization Wait Time And Pll Lock Wait Time - Fujitsu FR60 Hardware Manual

CHAPTER 3 CPU AND CONTROL UNITS
3.10.2 Oscillation Stabilization Wait Time and PLL Lock Wait
Time
If a clock selected as the source clock is not already stabilized, an oscillation
stabilization wait time is required (See Section "3.9.4 Oscillation Stabilization Wait
Time").
For a PLL, a lock wait time is required after operation starts until the output stabilizes to
the specified frequency.
This section describes the wait time used in various situations.
■ Wait Time after Power-On
After power-on, an oscillation stabilization wait time for the main clock oscillation circuit is required.
Since the oscillation stabilization wait time setting is initialized to the minimum value due to INIT pin input
(settings initialization reset pin), assure the oscillation stabilization wait time by using the time during
which the "L" level is sent to the INIT pin input.
In this state, since no PLL is enabled, no lock wait time needs to be considered.
■ Wait Time after Setting Initialization
If a settings initialization reset (INIT) is cleared, the device enters the oscillation stabilization wait state. In
this case, the specified oscillation stabilization wait time is internally generated.
In the first oscillation stabilization wait state after input from the INIT pin, the setting time is initialized to
the minimum value, soon ending this state, and the device enters the operation initialization reset (RST)
state.
If, after a program starts running, a settings initialization reset (INIT) is generated for a reason other than
INIT pin input and is then cleared, the oscillation stabilization wait time specified in the program is
internally generated.
In these states, since no PLL is enabled, no lock wait time needs to be considered.
■ Wait Time after Enabling a PLL
If you enable a stopped PLL after a program starts execution, use the PLL output only after the lock wait
time elapses.
If the PLL is not selected as the source clock, the program can run even during the lock wait time. For the
PLL lock wait time, use of a timebase timer interrupt is recommended.
■ Wait Time after Changing the PLL Multiply-by Rate
If you change the multiply-by rate setting of a running PLL after a program starts execution, use the PLL
output only after lock wait time elapses.
If the PLL is not selected as the source clock, the program can run even during the lock wait time.
For the PLL lock wait time, use of a timebase timer interrupt is recommended.
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