Fujitsu FR60 Hardware Manual page 306

CHAPTER 7 16-BIT FREE-RUNNING TIMER AND 16-BIT RELOAD TIMER
■ Block Diagram of the 16-bit Reload Timer
Figure 7.2-1 is a block diagram of the 16-bit reload timer.
16-bit reload register (TMRLR)
16
7
16
16-bit down counter (TMR)
Count enable
Clock selector
3
φ φ φ
φ
− − −
−
(Channel 3 only)
Peripheral machine clock input
Note: The MB91F353A/351A/352A/353A do not have external timer output (TOT0 to TOT3).
288
Figure 7.2-1 Block Diagram of the 16-bit Reload Timer
UF
CSL2
CSL1
CSL0
IN CTL.
EXCK
φ
−
Prescaler clearing
Reload
OUT
CTL.
Re-trigger
T0E0 to T0E3
RELD
OUTL
INTE
UF
IRQ
CNTE
TRG
External timer output
(TOT0 to TOT3)
Bits in PFRK