Fujitsu FR60 Hardware Manual page 657

Reload/Compare Register
Reload/Compare Register 0/1 (RCR 0/1)............ 258
Reset
INIT Pin Input (Settings Initialization Reset Pin)
............................................................ 96
Normal Reset Operation ................................... 102
Operation Initialization Reset (RST) .................... 95
Operation Initialization Reset (RST) Clear
Sequence.............................................. 98
Overview of Reset (Device Initialization)............. 94
Read/Reset Command ...................................... 549
Reset Source Register/Watchdog Timer Control
Register (RSRR) ................................. 112
Setting Initialization Reset (INIT) Clear
Sequence.............................................. 98
Settings Initialization Reset (INIT) ...................... 95
Software Reset (STCR: SRST Bit Writing) .......... 97
Synchronous Reset Operation............................ 102
Watchdog Reset ................................................. 97
Watchdog Reset Postpone Register (WPR)......... 124
Reset Operation
Normal Reset Operation ................................... 102
Synchronous Reset Operation............................ 102
Reset Source Register
Reset Source Register/Watchdog Timer Control
Register (RSRR) ................................. 112
Resetting
Reading/Resetting Flash Memory ...................... 558
Restarting Sector Erase
Restarting Sector Erase in Flash Memory ........... 565
Restore
Save/Restore Processing ................................... 362
Restriction
Restriction on Section Types ............................... 42
Restrictions on Prefetch-enabled Areas .............. 221
RETI
Operation of RETI Instruction ............................. 89
Return
Return from EIT ................................................ 72
Return from Standby ........................................ 348
Return from Standby Mode (Sleep/Stop) ............ 338
Return Pointer
RP (Return Pointer)............................................ 62
ROM
FR-CPU ROM Mode (32 Bits,Read only) .......... 545
RP
RP (Return Pointer)............................................ 62
RSRR
Reset Source Register/Watchdog Timer Control
Register (RSRR) ................................. 112
RST
Operation Initialization Reset (RST) .................... 95
Operation Initialization Reset (RST) Clear
Sequence.............................................. 98
S
Save
Save/Restore Processing....................................362
Scan Conversion Mode
Scan Conversion Mode .....................................377
SCR
SCR (System Condition Code Register)................60
Serial Control Register (SCR) ............................391
SDR
Serial Shift Data Register (SDR) ........................416
Section
Sections .............................................................41
Section Type
Restriction on Section Types ...............................42
Sector Address Table
Sector Address Table of Flash Memory ..............537
Sector Erase
Restarting Sector Erase in Flash Memory............565
Sector Erase .....................................................550
Sector Erase Procedure......................................562
Temporarily Stopping Sector Erase in Flash
Memory..............................................564
Selecting
Selecting an Oscillation Stabilization Wait
Time...................................................100
Selecting a Clock
Selecting a Clock for the UART.........................399
Selecting Counting Mode
Selecting Counting Mode ..................................259
Selection
Selection of Source Clock .................................104
Selection of the Transfer Sequence.....................497
Serial Control Register
Serial Control Register (SCR) ............................391
Serial I/O Interface
Block Diagram of the Serial I/O Interface (SIO)
..........................................................412
Overview of Serial I/O Interface (SIO)
Operation............................................419
Overview of the Serial I/O Interface (SIO) ..........410
Serial I/O Interface (SIO) Registers ....................411
Serial I/O Interface Operating Modes .................411
States of Serial I/O Interface Operation...............420
Serial I/O Prescaler Control Register
Serial I/O Prescaler Control Register (CDCR)
..........................................................417
Serial Input Data Register
Serial Input Data Register (SIDR)/Serial Output Data
Register (SODR) .................................394
Serial Mode Control Status Register
Serial Mode Control Status Register (SMCS)
..........................................................413
INDEX
639