Appendix C Pin States In Each Cpu State - Fujitsu FR60 Hardware Manual

APPENDIX C Pin States in Each CPU State

Table C-1 explains the terms used in the pin state lists. Table C-2 and Table C-3 list the
pin states in each CPU state.
■ Explanation of Terms Used in the Pin State Lists
Table C-1 explains the terms used for pin states.
Table C-1 Explanation of Terms Used in the Pin State Lists
Input enabled
Input always "0"
Hi-Z output
Output maintained
Previous state maintained
Term
The input function can be used.
External input is blocked by the input gate immediately after the pin and "0"
is propagated internally.
The pin-driving transistor is set to the drive-disabled state and the pin is set
to high impedance.
The output state immediately before this mode is set continues as the output
state. That is, if an output internal peripheral is operating, output is
performed based on the internal peripheral. If output using a port is being
performed, that type of output is maintained.
For output, the output state immediately before this mode is set continues as
the output state. For input, the previous input state is maintained.
APPENDIX C Pin States in Each CPU State
Explanation
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